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<title>linux-stable.git/arch/powerpc/kernel/cpu_setup_power.S, branch v3.9.7</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>powerpc/power8: Fix secondary CPUs hanging on boot for HV=0</title>
<updated>2013-05-08T03:33:03+00:00</updated>
<author>
<name>Michael Neuling</name>
<email>mikey@neuling.org</email>
</author>
<published>2013-04-24T21:00:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=9802546fdf7169e9270f9ddec7fdfae02d3f4e8c'/>
<id>9802546fdf7169e9270f9ddec7fdfae02d3f4e8c</id>
<content type='text'>
commit 8c2a381734fc9718f127f4aba958e8a7958d4028 upstream.

In __restore_cpu_power8 we determine if we are HV and if not, we return
before setting HV only resources.

Unfortunately we forgot to restore the link register from r11 before
returning.

This will happen on boot and with secondary CPUs not coming online.

This adds the missing link register restore.

Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
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<pre>
commit 8c2a381734fc9718f127f4aba958e8a7958d4028 upstream.

In __restore_cpu_power8 we determine if we are HV and if not, we return
before setting HV only resources.

Unfortunately we forgot to restore the link register from r11 before
returning.

This will happen on boot and with secondary CPUs not coming online.

This adds the missing link register restore.

Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: Set DSCR bit in FSCR setup</title>
<updated>2013-03-05T05:56:30+00:00</updated>
<author>
<name>Michael Neuling</name>
<email>mikey@neuling.org</email>
</author>
<published>2013-03-04T19:45:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=54c9b2253d34e8998e4bff9ac2d7a3ba0b861d52'/>
<id>54c9b2253d34e8998e4bff9ac2d7a3ba0b861d52</id>
<content type='text'>
We support DSCR (Data Stream Control Register) so we should make sure we set it
in the FSCR (Facility Status &amp; Control Register) incase some firmwares don't
set it.  If we don't set this, we'll take a facility unavailable exception when
using the DSCR.

Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
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<pre>
We support DSCR (Data Stream Control Register) so we should make sure we set it
in the FSCR (Facility Status &amp; Control Register) incase some firmwares don't
set it.  If we don't set this, we'll take a facility unavailable exception when
using the DSCR.

Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: Fix setting FSCR for HV=0 and on secondary CPUs</title>
<updated>2013-03-05T05:56:29+00:00</updated>
<author>
<name>Michael Neuling</name>
<email>mikey@neuling.org</email>
</author>
<published>2013-03-04T19:45:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=57d231678ace658b3a73a0d144cfebbd4257bc0e'/>
<id>57d231678ace658b3a73a0d144cfebbd4257bc0e</id>
<content type='text'>
Currently we only set the FSCR (Facility Status and Control Register) when HV=1
but this feature is available when HV=0 also.  This patch sets FSCR when HV=0.

Also, we currently only set the FSCR on the master CPU.  This patch also sets
the FSCR on secondary CPUs.

Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
cc: Ian Munsie &lt;imunsie@au1.ibm.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
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<pre>
Currently we only set the FSCR (Facility Status and Control Register) when HV=1
but this feature is available when HV=0 also.  This patch sets FSCR when HV=0.

Also, we currently only set the FSCR on the master CPU.  This patch also sets
the FSCR on secondary CPUs.

Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
cc: Ian Munsie &lt;imunsie@au1.ibm.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: Add support for context switching the TAR register</title>
<updated>2013-02-08T03:05:50+00:00</updated>
<author>
<name>Ian Munsie</name>
<email>imunsie@au1.ibm.com</email>
</author>
<published>2013-02-07T15:46:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=2468dcf641e4f3e1b0153e3e11ca20740b2f4ce8'/>
<id>2468dcf641e4f3e1b0153e3e11ca20740b2f4ce8</id>
<content type='text'>
This patch adds support for enabling and context switching the Target
Address Register in Power8. The TAR is a new special purpose register
that can be used for computed branches with the bctar[l] (branch
conditional to TAR) instruction in the same manner as the count and link
registers.

Signed-off-by: Ian Munsie &lt;imunsie@au1.ibm.com&gt;
Signed-off-by: Matt Evans &lt;matt@ozlabs.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds support for enabling and context switching the Target
Address Register in Power8. The TAR is a new special purpose register
that can be used for computed branches with the bctar[l] (branch
conditional to TAR) instruction in the same manner as the count and link
registers.

Signed-off-by: Ian Munsie &lt;imunsie@au1.ibm.com&gt;
Signed-off-by: Matt Evans &lt;matt@ozlabs.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: Setup relocation on exceptions for bare metal systems</title>
<updated>2012-11-15T04:08:06+00:00</updated>
<author>
<name>Michael Neuling</name>
<email>mikey@neuling.org</email>
</author>
<published>2012-11-02T05:41:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b0302722eec7c086a31de6e3d9789304ef21df7b'/>
<id>b0302722eec7c086a31de6e3d9789304ef21df7b</id>
<content type='text'>
This turns on MMU on execptions via AIL field in the LPCR.

Signed-off-by: Matt Evans &lt;matt@ozlabs.org&gt;
Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This turns on MMU on execptions via AIL field in the LPCR.

Signed-off-by: Matt Evans &lt;matt@ozlabs.org&gt;
Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: Move initial mfspr LPCR out of __init_LPCR</title>
<updated>2012-11-15T04:08:05+00:00</updated>
<author>
<name>Michael Neuling</name>
<email>mikey@neuling.org</email>
</author>
<published>2012-11-05T03:40:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=f7c32c24f5788798f17d4e520a5d238335a859cb'/>
<id>f7c32c24f5788798f17d4e520a5d238335a859cb</id>
<content type='text'>
We want to change what's initially set in the LPCR, so start by taking the move
from LPCR out of the function and into the caller.

Signed-off-by: Matt Evans &lt;matt@ozlabs.org&gt;
Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We want to change what's initially set in the LPCR, so start by taking the move
from LPCR out of the function and into the caller.

Signed-off-by: Matt Evans &lt;matt@ozlabs.org&gt;
Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: Add POWER8 setup code</title>
<updated>2012-11-15T02:00:42+00:00</updated>
<author>
<name>Michael Neuling</name>
<email>mikey@neuling.org</email>
</author>
<published>2012-10-30T19:34:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=aec937b1ee6d7b28499d50ea6df1b2fe9edee91b'/>
<id>aec937b1ee6d7b28499d50ea6df1b2fe9edee91b</id>
<content type='text'>
Just a copy of POWER7 for now.  Will update with new code later.

Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
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<pre>
Just a copy of POWER7 for now.  Will update with new code later.

Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: make POWER7 setup code name generic</title>
<updated>2012-11-15T02:00:39+00:00</updated>
<author>
<name>Michael Neuling</name>
<email>mikey@neuling.org</email>
</author>
<published>2012-10-30T19:34:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=cd5daaf713cf8d728a2be2a3673293fff9465d9a'/>
<id>cd5daaf713cf8d728a2be2a3673293fff9465d9a</id>
<content type='text'>
We are going to reuse this in POWER8 so make the name generic.

Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
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<pre>
We are going to reuse this in POWER8 so make the name generic.

Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
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