<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/arch/parisc/include, branch linux-2.6.31.y</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()</title>
<updated>2009-07-27T19:10:38+00:00</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2009-07-22T05:44:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=9e1b32caa525cb236e80e9c671e179bcecccc657'/>
<id>9e1b32caa525cb236e80e9c671e179bcecccc657</id>
<content type='text'>
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()

Upcoming paches to support the new 64-bit "BookE" powerpc architecture
will need to have the virtual address corresponding to PTE page when
freeing it, due to the way the HW table walker works.

Basically, the TLB can be loaded with "large" pages that cover the whole
virtual space (well, sort-of, half of it actually) represented by a PTE
page, and which contain an "indirect" bit indicating that this TLB entry
RPN points to an array of PTEs from which the TLB can then create direct
entries. Thus, in order to invalidate those when PTE pages are deleted,
we need the virtual address to pass to tlbilx or tlbivax instructions.

The old trick of sticking it somewhere in the PTE page struct page sucks
too much, the address is almost readily available in all call sites and
almost everybody implemets these as macros, so we may as well add the
argument everywhere. I added it to the pmd and pud variants for consistency.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Acked-by: David Howells &lt;dhowells@redhat.com&gt; [MN10300 &amp; FRV]
Acked-by: Nick Piggin &lt;npiggin@suse.de&gt;
Acked-by: Martin Schwidefsky &lt;schwidefsky@de.ibm.com&gt; [s390]
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()

Upcoming paches to support the new 64-bit "BookE" powerpc architecture
will need to have the virtual address corresponding to PTE page when
freeing it, due to the way the HW table walker works.

Basically, the TLB can be loaded with "large" pages that cover the whole
virtual space (well, sort-of, half of it actually) represented by a PTE
page, and which contain an "indirect" bit indicating that this TLB entry
RPN points to an array of PTEs from which the TLB can then create direct
entries. Thus, in order to invalidate those when PTE pages are deleted,
we need the virtual address to pass to tlbilx or tlbivax instructions.

The old trick of sticking it somewhere in the PTE page struct page sucks
too much, the address is almost readily available in all call sites and
almost everybody implemets these as macros, so we may as well add the
argument everywhere. I added it to the pmd and pud variants for consistency.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Acked-by: David Howells &lt;dhowells@redhat.com&gt; [MN10300 &amp; FRV]
Acked-by: Nick Piggin &lt;npiggin@suse.de&gt;
Acked-by: Martin Schwidefsky &lt;schwidefsky@de.ibm.com&gt; [s390]
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sched: INIT_PREEMPT_COUNT</title>
<updated>2009-07-10T21:24:05+00:00</updated>
<author>
<name>Peter Zijlstra</name>
<email>a.p.zijlstra@chello.nl</email>
</author>
<published>2009-07-10T12:57:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=c99e6efe1ba04561e7d93a81f0be07e37427e835'/>
<id>c99e6efe1ba04561e7d93a81f0be07e37427e835</id>
<content type='text'>
Pull the initial preempt_count value into a single
definition site.

Maintainers for: alpha, ia64 and m68k, please have a look,
your arch code is funny.

The header magic is a bit odd, but similar to the KERNEL_DS
one, CPP waits with expanding these macros until the
INIT_THREAD_INFO macro itself is expanded, which is in
arch/*/kernel/init_task.c where we've already included
sched.h so we're good.

Cc: tony.luck@intel.com
Cc: rth@twiddle.net
Cc: geert@linux-m68k.org
Signed-off-by: Peter Zijlstra &lt;a.p.zijlstra@chello.nl&gt;
Acked-by: Matt Mackall &lt;mpm@selenic.com&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull the initial preempt_count value into a single
definition site.

Maintainers for: alpha, ia64 and m68k, please have a look,
your arch code is funny.

The header magic is a bit odd, but similar to the KERNEL_DS
one, CPP waits with expanding these macros until the
INIT_THREAD_INFO macro itself is expanded, which is in
arch/*/kernel/init_task.c where we've already included
sched.h so we're good.

Cc: tony.luck@intel.com
Cc: rth@twiddle.net
Cc: geert@linux-m68k.org
Signed-off-by: Peter Zijlstra &lt;a.p.zijlstra@chello.nl&gt;
Acked-by: Matt Mackall &lt;mpm@selenic.com&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>parisc: use generic atomic64 on 32-bit</title>
<updated>2009-07-03T03:34:13+00:00</updated>
<author>
<name>Kyle McMartin</name>
<email>kyle@mcmartin.ca</email>
</author>
<published>2009-07-02T17:10:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=64daa4435a40aa1b7d0ece598ae783b89dda13ee'/>
<id>64daa4435a40aa1b7d0ece598ae783b89dda13ee</id>
<content type='text'>
Somewhat redundant since our atomic_t uses hashed-locks on 32-bit
anyway... Maybe we can clean those up to be generic too someday.

Signed-off-by: Kyle McMartin &lt;kyle@mcmartin.ca&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Somewhat redundant since our atomic_t uses hashed-locks on 32-bit
anyway... Maybe we can clean those up to be generic too someday.

Signed-off-by: Kyle McMartin &lt;kyle@mcmartin.ca&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>parisc: perf: wire up sys_perf_counter_open</title>
<updated>2009-07-03T03:34:12+00:00</updated>
<author>
<name>Kyle McMartin</name>
<email>kyle@mcmartin.ca</email>
</author>
<published>2009-06-24T01:38:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=2d4618dce6a318ff4ec78dfe492cc3793015d540'/>
<id>2d4618dce6a318ff4ec78dfe492cc3793015d540</id>
<content type='text'>
Signed-off-by: Kyle McMartin &lt;kyle@mcmartin.ca&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Kyle McMartin &lt;kyle@mcmartin.ca&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>parisc: add task_pt_regs macro</title>
<updated>2009-07-03T03:34:11+00:00</updated>
<author>
<name>Kyle McMartin</name>
<email>kyle@mcmartin.ca</email>
</author>
<published>2009-06-24T01:32:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=abf1e11a0dcf5514139cb76ed8eb050107653abd'/>
<id>abf1e11a0dcf5514139cb76ed8eb050107653abd</id>
<content type='text'>
needed for perf_counters.

Signed-off-by: Kyle McMartin &lt;kyle@mcmartin.ca&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
needed for perf_counters.

Signed-off-by: Kyle McMartin &lt;kyle@mcmartin.ca&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>parisc: wire sys_perf_counter_open to sys_ni_syscall</title>
<updated>2009-07-03T03:34:11+00:00</updated>
<author>
<name>Kyle McMartin</name>
<email>kyle@mcmartin.ca</email>
</author>
<published>2009-06-24T00:22:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=538e23615fe78b6da151ef136e3f7c6ad1fda2c1'/>
<id>538e23615fe78b6da151ef136e3f7c6ad1fda2c1</id>
<content type='text'>
Reserve a syscall slot for sys_perf_counter_open.

Signed-off-by: Kyle McMartin &lt;kyle@mcmartin.ca&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Reserve a syscall slot for sys_perf_counter_open.

Signed-off-by: Kyle McMartin &lt;kyle@mcmartin.ca&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>parisc: wire up rt_tgsigqueueinfo</title>
<updated>2009-07-03T03:34:10+00:00</updated>
<author>
<name>Kyle McMartin</name>
<email>kyle@mcmartin.ca</email>
</author>
<published>2009-06-23T15:40:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=4435607e986c792a8753f8850b570fdd80b21b10'/>
<id>4435607e986c792a8753f8850b570fdd80b21b10</id>
<content type='text'>
Signed-off-by: Kyle McMartin &lt;kyle@mcmartin.ca&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Kyle McMartin &lt;kyle@mcmartin.ca&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>parisc: ensure broadcast tlb purge runs single threaded</title>
<updated>2009-07-03T03:34:09+00:00</updated>
<author>
<name>Helge Deller</name>
<email>deller@gmx.de</email>
</author>
<published>2009-06-16T20:51:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e82a3b75127188f20c7780bec580e148beb29da7'/>
<id>e82a3b75127188f20c7780bec580e148beb29da7</id>
<content type='text'>
The TLB flushing functions on hppa, which causes PxTLB broadcasts on the system
bus, needs to be protected by irq-safe spinlocks to avoid irq handlers to deadlock
the kernel. The deadlocks only happened during I/O intensive loads and triggered
pretty seldom, which is why this bug went so long unnoticed.

Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
[edited to use spin_lock_irqsave on UP as well since we'd been locking there
 all this time anyway, --kyle]
Signed-off-by: Kyle McMartin &lt;kyle@mcmartin.ca&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The TLB flushing functions on hppa, which causes PxTLB broadcasts on the system
bus, needs to be protected by irq-safe spinlocks to avoid irq handlers to deadlock
the kernel. The deadlocks only happened during I/O intensive loads and triggered
pretty seldom, which is why this bug went so long unnoticed.

Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
[edited to use spin_lock_irqsave on UP as well since we'd been locking there
 all this time anyway, --kyle]
Signed-off-by: Kyle McMartin &lt;kyle@mcmartin.ca&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>parisc: fix ldcw inline assembler</title>
<updated>2009-07-03T03:34:07+00:00</updated>
<author>
<name>Helge Deller</name>
<email>deller@gmx.de</email>
</author>
<published>2009-04-30T21:39:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=7d17e2763129ea307702fcdc91f6e9d114b65c2d'/>
<id>7d17e2763129ea307702fcdc91f6e9d114b65c2d</id>
<content type='text'>
There are two reasons to expose the memory *a in the asm:

1) To prevent the compiler from discarding a preceeding write to *a, and
2) to prevent it from caching *a in a register over the asm.

The change has had a few days testing with a SMP build of 2.6.22.19
running on a rp3440.

This patch is about the correctness of the __ldcw() macro itself.
The use of the macro should be confined to small inline functions
to try to limit the effect of clobbering memory on GCC's optimization
of loads and stores.

Signed-off-by: Dave Anglin &lt;dave.anglin@nrc-cnrc.gc.ca&gt;
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
Signed-off-by: Kyle McMartin &lt;kyle@mcmartin.ca&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There are two reasons to expose the memory *a in the asm:

1) To prevent the compiler from discarding a preceeding write to *a, and
2) to prevent it from caching *a in a register over the asm.

The change has had a few days testing with a SMP build of 2.6.22.19
running on a rp3440.

This patch is about the correctness of the __ldcw() macro itself.
The use of the macro should be confined to small inline functions
to try to limit the effect of clobbering memory on GCC's optimization
of loads and stores.

Signed-off-by: Dave Anglin &lt;dave.anglin@nrc-cnrc.gc.ca&gt;
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
Signed-off-by: Kyle McMartin &lt;kyle@mcmartin.ca&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>parisc: Remove casts from atomic macros</title>
<updated>2009-07-03T03:34:06+00:00</updated>
<author>
<name>Bastian Blank</name>
<email>waldi@debian.org</email>
</author>
<published>2009-04-04T20:54:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=692c14a5931341a37e4fbfca5fa96751187a108f'/>
<id>692c14a5931341a37e4fbfca5fa96751187a108f</id>
<content type='text'>
The atomic operations on parisc are defined as macros. The macros
includes casts which disallows the use of some syntax elements and
produces error like this:

net/phonet/pep.c: In function 'pipe_rcv_status':
net/phonet/pep.c:262: error: lvalue required as left operand of assignment

The patch removes this superfluous casts.

Signed-off-by: Bastian Blank &lt;waldi@debian.org&gt;
Signed-off-by: Kyle McMartin &lt;kyle@mcmartin.ca&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The atomic operations on parisc are defined as macros. The macros
includes casts which disallows the use of some syntax elements and
produces error like this:

net/phonet/pep.c: In function 'pipe_rcv_status':
net/phonet/pep.c:262: error: lvalue required as left operand of assignment

The patch removes this superfluous casts.

Signed-off-by: Bastian Blank &lt;waldi@debian.org&gt;
Signed-off-by: Kyle McMartin &lt;kyle@mcmartin.ca&gt;
</pre>
</div>
</content>
</entry>
</feed>
