linux-stable.git/arch/mips, branch linux-2.6.22.y

[MIPS] Fix scheduling latency issue on 24K, 34K and 74K cores

2007-07-06T15:17:11+00:00

The idle loop goes to sleep using the WAIT instruction if !need_resched().
This has is suffering from from a race condition that if if just after
need_resched has returned 0 an interrupt might set TIF_NEED_RESCHED but
we've just completed the test so go to sleep anyway.  This would be
trivial to fix by just disabling interrupts during that sequence as in:

        local_irq_disable();
        if (!need_resched())
                __asm__("wait");
        local_irq_enable();

but the processor architecture leaves it undefined if a processor calling
WAIT with interrupts disabled will ever restart its pipeline and indeed
some processors have made use of the freedom provided by the architecture
definition.  This has been resolved and the Config7.WII bit indicates that
the use of WAIT is safe on 24K, 24KE and 34K cores.  It also is safe on
74K starting revision 2.1.0 so enable the use of WAIT with interrupts
disabled for 74K based on a c0_prid of at least that.

Signed-off-by: Ralf Baechle

[MIPS] SMTC: Fix cut'n'paste bug in Kconfig.debug

2007-07-06T15:17:11+00:00

This effectivly turned the SMTC_IDLE_HOOK_DEBUG debug option into a no-op.

Signed-off-by: Ralf Baechle

[MIPS] Change libgcc-style functions from lib-y to obj-y

2007-07-06T15:17:11+00:00

Reported by Eugene Surovegin .

If only modules were users of these functions they did not get linked into
the kernel proper, so later module loads would fail as well.

Signed-off-by: Ralf Baechle

[MIPS] Fix timer/performance interrupt detection

2007-07-06T15:17:11+00:00

Signed-off-by: Chris Dearman 
Signed-off-by: Ralf Baechle

[MIPS] AP/SP: Avoid triggering the 34K E125 performance issue

2007-07-06T15:17:10+00:00

C0_status doesn't need to be initialized at this point anyway; the register
will be initialized later.

Signed-off-by: Ralf Baechle

[MIPS] VSMP: Fix initialization ordering bug.

2007-07-04T14:53:16+00:00

Signed-off-by: Ralf Baechle

mips-jazz: correct flags for timer io resource

2007-06-28T18:38:19+00:00

arch/mips/jazz/setup.c:55:4: error: Initializer entry defined twice

Signed-off-by: Alexey Dobriyan 
Acked-by: Ralf Baechle 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

[MIPS] Count timer interrupts correctly.

2007-06-26T17:57:34+00:00

Signed-off-by: Chris Dearman 
Signed-off-by: Ralf Baechle

[MIPS] EMMA2RH: Disable GEN_RTC, it can't possibly work.

2007-06-26T17:57:34+00:00

Neither rtc_mips_get_time nor rtc_mips_set_time are being initialized by
the EMMA2RH setup code, so genrtc at best was a RTC dummy avoiding a few
error messages but not providing actual functionality.

Signed-off-by: Ralf Baechle

[MIPS] use compat_siginfo in rt_sigframe_n32

2007-06-26T17:57:33+00:00

Signed-off-by: Pavel Kiryukhin 
Signed-off-by: Ralf Baechle