linux-stable.git/arch/mips/kernel/traps.c, branch v3.2

MIPS: ASID conflict after CPU hotplug

2011-11-10T17:59:45+00:00

I am running SMP Linux 2.6.37-rc1 on BMIPS5000 (single core dual thread)
and observe some abnormalities when doing system suspend/resume which I
narrowed down to cpu hotplugging. The suspend brings the second thread
processor down and then restarts it, after which I see memory corruption
in userspace. I started digging and found out that problem occurs because
while doing execve() the child process is getting the same ASID as the
parent, which obviously corrupts parent's address space.

Further digging showed that activate_mm() calls get_new_mmu_context() to
get a new ASID, but at this time ASID field in entryHi is 1, and
asid_cache(cpu) is 0x100 (it was just reset to ASID_FIRST_VERSION when
the secondary TP was booting).

So, get_new_mmu_context() increments the asid_cache(cpu) value to
0x101, and thus puts 0x01 into entryHi. The result - ASID field does
not get changed as it was supposed to.

My solution is very simple - do not reset asid_cache(cpu) on TP warm
restart.

Patchwork: https://patchwork.linux-mips.org/patch/1797/
Signed-off-by: Ralf Baechle

mips: remove needless include of module.h from core kernel files.

2011-10-31T23:30:57+00:00

None of these files are using modular infrastructure, and build
tests reveal that none of these files are really relying on any
implicit inclusions via. module.h either.  So delete them.

Signed-off-by: Paul Gortmaker

MIPS: Call oops_enter, oops_exit in die

2011-10-01T19:36:04+00:00

This allows pause_on_oops and mtdoops to work.

Signed-off-by: Nathan Lynch 
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2810/
Signed-off-by: Ralf Baechle

MIPS: Make the die_lock be raw

2011-09-21T15:52:09+00:00

On preempt-rt this lock needs to be raw, so it does not get converted
to a sleeping spinlock. Trying to sleep in a panic is not really
desireable.

Signed-off-by: Wu Zhangjin 
Signed-off-by: Thomas Gleixner 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2636/
Signed-off-by: Ralf Baechle

perf: Remove the nmi parameter from the swevent and overflow interface

2011-07-01T09:06:35+00:00

The nmi parameter indicated if we could do wakeups from the current
context, if not, we would set some state and self-IPI and let the
resulting interrupt do the wakeup.

For the various event classes:

  - hardware: nmi=0; PMI is in fact an NMI or we run irq_work_run from
    the PMI-tail (ARM etc.)
  - tracepoint: nmi=0; since tracepoint could be from NMI context.
  - software: nmi=[0,1]; some, like the schedule thing cannot
    perform wakeups, and hence need 0.

As one can see, there is very little nmi=1 usage, and the down-side of
not using it is that on some platforms some software events can have a
jiffy delay in wakeup (when arch_irq_work_raise isn't implemented).

The up-side however is that we can remove the nmi parameter and save a
bunch of conditionals in fast paths.

Signed-off-by: Peter Zijlstra 
Cc: Michael Cree 
Cc: Will Deacon 
Cc: Deng-Cheng Zhu 
Cc: Anton Blanchard 
Cc: Eric B Munson 
Cc: Heiko Carstens 
Cc: Paul Mundt 
Cc: David S. Miller 
Cc: Frederic Weisbecker 
Cc: Jason Wessel 
Cc: Don Zickus 
Link: http://lkml.kernel.org/n/tip-agjev8eu666tvknpb3iaj0fg@git.kernel.org
Signed-off-by: Ingo Molnar

MIPS: Fix duplicate invocation of notify_die.

2011-05-18T13:18:26+00:00

Initial patch by Yury Polyanskiy .

Signed-off-by: Ralf Baechle 
Patchwork: https://patchwork.linux-mips.org/patch/2373/

MIPS: Use C0_KScratch (if present) to hold PGD pointer.

2011-01-18T18:30:22+00:00

Decide at runtime to use either Context or KScratch to hold the PGD
pointer.

Signed-off-by: David Daney 
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1876/
Signed-off-by: Ralf Baechle

MIPS: Send proper signal and siginfo on FP emulator faults.

2010-12-16T18:10:57+00:00

We were unconditionally sending SIGBUS with an empty siginfo on FP
emulator faults.  This differs from what happens when real floating
point hardware would get a fault.

For most faults we need to send SIGSEGV with the faulting address
filled in in the struct siginfo.

Reported-by: Camm Maguire 
Signed-off-by: David Daney 
To: linux-mips@linux-mips.org
Cc: Camm Maguire 
Patchwork: https://patchwork.linux-mips.org/patch/1727/
Signed-off-by: Ralf Baechle

MIPS: Allow UserLocal on MIPS_R1 processors

2010-10-29T18:08:53+00:00

Some MIPS32R1 processors implement UserLocal (RDHWR $29) to accelerate
programs that make extensive use of thread-local storage.  Therefore,
setting up the HWRENA register should not depend on cpu_has_mips_r2.

Signed-off-by: Kevin Cernekee 
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org

MIPS: add support for software performance events

2010-10-29T18:08:48+00:00

Software events are required as part of the measurable stuff by the
Linux performance counter subsystem. Here is the list of events added by
this patch:
PERF_COUNT_SW_PAGE_FAULTS
PERF_COUNT_SW_PAGE_FAULTS_MIN
PERF_COUNT_SW_PAGE_FAULTS_MAJ
PERF_COUNT_SW_ALIGNMENT_FAULTS
PERF_COUNT_SW_EMULATION_FAULTS

Signed-off-by: Deng-Cheng Zhu 
To: linux-mips@linux-mips.org
Cc: a.p.zijlstra@chello.nl
Cc: paulus@samba.org
Cc: mingo@elte.hu
Cc: acme@redhat.com
Cc: jamie.iles@picochip.com
Acked-by: David Daney 
Reviewed-by: Matt Fleming 
Patchwork: https://patchwork.linux-mips.org/patch/1686/
Signed-off-by: Ralf Baechle