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<title>linux-stable.git/arch/mips/kernel/traps.c, branch v3.16</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>Merge branch '3.15-fixes' into mips-for-linux-next</title>
<updated>2014-06-04T20:53:02+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2014-06-04T20:53:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=f8647b506d7116a1a3accd8d618184096e85f50b'/>
<id>f8647b506d7116a1a3accd8d618184096e85f50b</id>
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<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Call find_vma with the mmap_sem held</title>
<updated>2014-06-03T20:19:09+00:00</updated>
<author>
<name>Davidlohr Bueso</name>
<email>davidlohr@hp.com</email>
</author>
<published>2014-04-20T02:26:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=f7a89f1b8eb598ac5da61c9795b3d847baa73d12'/>
<id>f7a89f1b8eb598ac5da61c9795b3d847baa73d12</id>
<content type='text'>
Performing vma lookups without taking the mm-&gt;mmap_sem is asking
for trouble. While doing the search, the vma in question can be
modified or even removed before returning to the caller. Take the
lock (exclusively) in order to avoid races while iterating through
the vmacache and/or rbtree.

Updates two functions:
  - process_fpemu_return()
  - cteon_flush_cache_sigtramp()

Signed-off-by: Davidlohr Bueso &lt;davidlohr@hp.com&gt;
Tested-by: Andreas Herrmann &lt;andreas.herrmann@caviumnetworks.com&gt;
Cc: linux-mips@linux-mips.org
Cc: akpm@linux-foundation.org
Cc: zeus@gnu.org
Cc: aswin@hp.com
Cc: davidlohr@hp.com
Cc: linux-mm@kvack.org
Cc: linux-kernel@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/6811/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Performing vma lookups without taking the mm-&gt;mmap_sem is asking
for trouble. While doing the search, the vma in question can be
modified or even removed before returning to the caller. Take the
lock (exclusively) in order to avoid races while iterating through
the vmacache and/or rbtree.

Updates two functions:
  - process_fpemu_return()
  - cteon_flush_cache_sigtramp()

Signed-off-by: Davidlohr Bueso &lt;davidlohr@hp.com&gt;
Tested-by: Andreas Herrmann &lt;andreas.herrmann@caviumnetworks.com&gt;
Cc: linux-mips@linux-mips.org
Cc: akpm@linux-foundation.org
Cc: zeus@gnu.org
Cc: aswin@hp.com
Cc: davidlohr@hp.com
Cc: linux-mm@kvack.org
Cc: linux-kernel@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/6811/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'wip-mips-pm' of https://github.com/paulburton/linux into mips-for-linux-next</title>
<updated>2014-05-29T13:08:23+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2014-05-28T17:00:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=2e2d663d2dd64ffe9855be0b35aa221c9b8139f2'/>
<id>2e2d663d2dd64ffe9855be0b35aa221c9b8139f2</id>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>MIPS: Fix typo when reporting cache and ftlb errors for ImgTec cores</title>
<updated>2014-05-25T10:45:06+00:00</updated>
<author>
<name>Markos Chandras</name>
<email>markos.chandras@imgtec.com</email>
</author>
<published>2014-05-21T11:35:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=721a9205396c4ef2a811dd665ec2a232163b583d'/>
<id>721a9205396c4ef2a811dd665ec2a232163b583d</id>
<content type='text'>
Introduced by the following two commits:
75b5b5e0a262790fa11043fe45700499c7e3d818
"MIPS: Add support for FTLBs"
6de20451857ed14a4eecc28d08f6de5925d1cf96
"MIPS: Add printing of ES bit for Imgtec cores when cache error occurs"

Signed-off-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Reported-by: Matheus Almeida &lt;Matheus.Almeida@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Cc: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: stable@vger.kernel.org # v3.14+
Patchwork: https://patchwork.linux-mips.org/patch/6980/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Introduced by the following two commits:
75b5b5e0a262790fa11043fe45700499c7e3d818
"MIPS: Add support for FTLBs"
6de20451857ed14a4eecc28d08f6de5925d1cf96
"MIPS: Add printing of ES bit for Imgtec cores when cache error occurs"

Signed-off-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Reported-by: Matheus Almeida &lt;Matheus.Almeida@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Cc: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: stable@vger.kernel.org # v3.14+
Patchwork: https://patchwork.linux-mips.org/patch/6980/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: MT: Remove SMTC support</title>
<updated>2014-05-23T22:07:01+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2014-05-23T14:29:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b633648c5ad3cfbda0b3daea50d2135d44899259'/>
<id>b633648c5ad3cfbda0b3daea50d2135d44899259</id>
<content type='text'>
Nobody is maintaining SMTC anymore and there also seems to be no userbase.
Which is a pity - the SMTC technology primarily developed by Kevin D.
Kissell &lt;kevink@paralogos.com&gt; is an ingenious demonstration for the MT
ASE's power and elegance.

Based on Markos Chandras &lt;Markos.Chandras@imgtec.com&gt; patch
https://patchwork.linux-mips.org/patch/6719/ which while very similar did
no longer apply cleanly when I tried to merge it plus some additional
post-SMTC cleanup - SMTC was a feature as tricky to remove as it was to
merge once upon a time.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Nobody is maintaining SMTC anymore and there also seems to be no userbase.
Which is a pity - the SMTC technology primarily developed by Kevin D.
Kissell &lt;kevink@paralogos.com&gt; is an ingenious demonstration for the MT
ASE's power and elegance.

Based on Markos Chandras &lt;Markos.Chandras@imgtec.com&gt; patch
https://patchwork.linux-mips.org/patch/6719/ which while very similar did
no longer apply cleanly when I tried to merge it plus some additional
post-SMTC cleanup - SMTC was a feature as tricky to remove as it was to
merge once upon a time.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: traps: Add CPU PM callback for trap configuration</title>
<updated>2014-05-02T15:38:59+00:00</updated>
<author>
<name>James Hogan</name>
<email>james.hogan@imgtec.com</email>
</author>
<published>2014-03-04T10:20:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=ae4ce45419f908cf884d3fdc37f5706972068d34'/>
<id>ae4ce45419f908cf884d3fdc37f5706972068d34</id>
<content type='text'>
Implement a CPU power management callback for restoring trap related CPU
configuration after CPU power up from a low power state. The following
state is restored:

- Status register
- HWREna register
- Exception vector configuration registers
- Context/XContext register

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Implement a CPU power management callback for restoring trap related CPU
configuration after CPU power up from a low power state. The following
state is restored:

- Status register
- HWREna register
- Exception vector configuration registers
- Context/XContext register

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: traps: Set correct address limit for breakpoints and traps</title>
<updated>2014-03-26T22:09:13+00:00</updated>
<author>
<name>Leonid Yegoshin</name>
<email>Leonid.Yegoshin@imgtec.com</email>
</author>
<published>2013-12-04T16:39:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=078dde5e21dba9f4186ebfc2aef06341fd20efb4'/>
<id>078dde5e21dba9f4186ebfc2aef06341fd20efb4</id>
<content type='text'>
When a breakpoint or trap happens when operating in kernel mode but
on users behalf (eg syscall) it is necessary to change the address
limit to KERNEL_DS so any address checking can be bypassed and print
the correct stack trace.

Signed-off-by: Leonid Yegoshin &lt;Leonid.Yegoshin@imgtec.com&gt;
Signed-off-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
</content>
<content type='xhtml'>
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<pre>
When a breakpoint or trap happens when operating in kernel mode but
on users behalf (eg syscall) it is necessary to change the address
limit to KERNEL_DS so any address checking can be bypassed and print
the correct stack trace.

Signed-off-by: Leonid Yegoshin &lt;Leonid.Yegoshin@imgtec.com&gt;
Signed-off-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: kernel: traps: Whitespace clean up</title>
<updated>2014-03-26T22:09:13+00:00</updated>
<author>
<name>Markos Chandras</name>
<email>markos.chandras@imgtec.com</email>
</author>
<published>2013-12-04T16:20:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b08a9c95f80f2f760f62d70fcd5a869c425d17b6'/>
<id>b08a9c95f80f2f760f62d70fcd5a869c425d17b6</id>
<content type='text'>
Signed-off-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Add cases for CPU_P5600</title>
<updated>2014-03-26T22:09:11+00:00</updated>
<author>
<name>James Hogan</name>
<email>james.hogan@imgtec.com</email>
</author>
<published>2014-01-22T16:19:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=aced4cbd6e3da7dd71f19d0378d27aa74f76e70b'/>
<id>aced4cbd6e3da7dd71f19d0378d27aa74f76e70b</id>
<content type='text'>
Add a CPU_P5600 case to various switch statements, doing the same thing
as for CPU_PROAPTIV.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Reviewed-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6408/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a CPU_P5600 case to various switch statements, doing the same thing
as for CPU_PROAPTIV.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Reviewed-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6408/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Dumb MSA FP exception handler</title>
<updated>2014-03-26T22:09:10+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2014-01-27T15:23:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=2bcb3fbc3fc593d2ec1efbdeb3e71b9475afe320'/>
<id>2bcb3fbc3fc593d2ec1efbdeb3e71b9475afe320</id>
<content type='text'>
This patch adds a simple handler for MSA FP exceptions which delivers a
SIGFPE to the running task. In the future it should probably be extended
to re-execute the instruction with the MSACSR.NX bit set in order to
generate results for any elements which did not cause an exception
before delivering the SIGFPE signal.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6432/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds a simple handler for MSA FP exceptions which delivers a
SIGFPE to the running task. In the future it should probably be extended
to re-execute the instruction with the MSACSR.NX bit set in order to
generate results for any elements which did not cause an exception
before delivering the SIGFPE signal.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6432/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
