linux-stable.git/arch/mips/kernel/setup.c, branch v3.18.76

Revert "MIPS: Reserve nosave data for hibernation"

2016-08-01T15:16:01+00:00

This reverts commit 1dd0964204277108e3e06e7df4c1f06a79d55093.

Signed-off-by: Sasha Levin

MIPS: Reserve nosave data for hibernation

2016-07-12T12:48:19+00:00

[ Upstream commit a95d069204e178f18476f5499abab0d0d9cbc32c ]

After commit 92923ca3aacef63c92d ("mm: meminit: only set page reserved
in the memblock region"), the MIPS hibernation is broken. Because pages
in nosave data section should be "reserved", but currently they aren't
set to "reserved" at initialization. This patch makes hibernation work
again.

Signed-off-by: Huacai Chen 
Cc: Aurelien Jarno 
Cc: Steven J . Hill 
Cc: Fuxin Zhang 
Cc: Zhangjin Wu 
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12888/
Signed-off-by: Ralf Baechle 
Signed-off-by: Sasha Levin

MIPS: Fix address type used for early memory detection.

2014-11-24T06:44:07+00:00

In 'early_parse_mem' the data type used for the start
and size of a memory region specified on the command line
is incorrect. If 64-bit addressing is used, the value
gets truncated.

Signed-off-by: Steven J. Hill 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8456/
Signed-off-by: Ralf Baechle

MIPS: Fix info about plat_setup in arch_mem_init comment

2014-11-24T06:44:04+00:00

Signed-off-by: Rafał Miłecki 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7607/
Signed-off-by: Ralf Baechle

MIPS: CMA: Do not reserve memory if not required

2014-10-29T01:59:25+00:00

Even if CMA is disabled, the for_each_memblock macro expands
to run reserve_bootmem once. Hence, reserve_bootmem attempts to
reserve location 0 of size 0.

Add a check to avoid that.

Issue was highlighted during testing with EVA enabled.
resrve_bootmem used to exit gracefully when passed arguments to
reserve 0 size location at 0 without EVA.

But with EVA enabled, macros would point to different addresses
and the code would trigger a BUG.

Signed-off-by: Zubair Lutfullah Kakakhel 
Tested-by: Markos Chandras 
Tested-by: Huacai Chen 
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8231/
Signed-off-by: Ralf Baechle

MIPS: DMA: Add cma support

2014-09-22T11:35:52+00:00

Adds cma support to the MIPS architecture.

cma uses memblock. However, mips uses bootmem.
bootmem is informed about any regions reserved by memblock

dma api is modified to use cma reserved memory regions when available

Tested using cma_test. cma_test is a simple driver that assigns blocks
of memory from cma reserved sections.

Signed-off-by: Zubair Lutfullah Kakakhel 
Acked-by: Michal Nazarewicz 
Cc: catalin.marinas@arm.com
Cc: will.deacon@arm.com
Cc: tglx@linutronix.de
Cc: mingo@redhat.com
Cc: hpa@zytor.com
Cc: arnd@arndb.de
Cc: gregkh@linuxfoundation.org
Cc: m.szyprowski@samsung.com
Cc: x86@kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-arch@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7360/
Signed-off-by: Ralf Baechle

MIPS: Add NUMA support for Loongson-3

2014-07-30T19:46:19+00:00

Multiple Loongson-3A chips can be interconnected with HT0-bus. This is
a CC-NUMA system that every chip (node) has its own local memory and
cache coherency is maintained by hardware. The 64-bit physical memory
address format is as follows:

0x-0000-YZZZ-ZZZZ-ZZZZ

The high 16 bits should be 0, which means the real physical address
supported by Loongson-3 is 48-bit. The "Y" bits is the base address of
each node, which can be also considered as the node-id. The "Z" bits is
the address offset within a node, which means every node has a 44 bits
address space.

Macros XPHYSADDR and MAX_PHYSMEM_BITS are modified unconditionally,
because many other MIPS CPUs have also extended their address spaces.

Signed-off-by: Huacai Chen 
Cc: John Crispin 
Cc: Steven J. Hill 
Cc: Aurelien Jarno 
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang 
Cc: Zhangjin Wu 
Patchwork: https://patchwork.linux-mips.org/patch/7187/
Signed-off-by: Ralf Baechle

MIPS: Support hard limit of cpu count (nr_cpu_ids)

2014-07-30T19:44:46+00:00

On MIPS currently, only the soft limit of cpu count (maxcpus) has its
effect, this patch enable the hard limit (nr_cpus) as well. Processor
cores which greater than maxcpus and less than nr_cpus can be taken up
via cpu hotplug. The code is borrowed from X86.

Signed-off-by: Huacai Chen 
Reviewed-by: Andreas Herrmann 
Cc: John Crispin 
Cc: Steven J. Hill 
Cc: Aurelien Jarno 
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang 
Cc: Zhangjin Wu 
Patchwork: https://patchwork.linux-mips.org/patch/7183/
Signed-off-by: Ralf Baechle

MIPS: Fix start of free memory when using initrd

2013-10-29T20:24:23+00:00

Currently when using an initrd on a MIPS system the start of the bootmem
region of memory is set to the larger of the end of the kernel bss region
(_end) or the end of the initrd. In a typical memory layout where the
initrd is at some address above the kernel image this means that the start
of the bootmem region will be the end of the initrd. But when we are done
processing/loading the initrd we have no way to reclaim the memory region
it occupied, and we lose a large chunk of now otherwise empty RAM from our
final running system.

The bootmem code is designed to allow this initrd to be reserved (and the
code in finalize_initrd() currently does this). When the initrd is finally
processed/loaded its reserved memory is freed.

Fix the setting of the start of the bootmem map to be the end of the kernel.

[ralf@linux-mips.org: fold in the fix of Ashok Kumar .]

Signed-off-by: Greg Ungerer 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1574/
Cc: Ashok Kumar 
Patchwork: https://patchwork.linux-mips.org/patch/5883/
Patchwork: https://patchwork.linux-mips.org/patch/6028/
Patchwork: https://patchwork.linux-mips.org/patch/6064/
Signed-off-by: Ralf Baechle

MIPS: kexec: Fix random crashes while loading crashkernel

2013-09-05T18:53:43+00:00

Fixed compilation errors in case of non-KEXEC kernel
Rearranging code so that crashk_res gets updated.
- crashk_res is updated after mips_parse_crashkernel(),
   after resource_init(), which is after arch_mem_init().
- The reserved memory is actually treated as Usable memory,
   Unless we load the crash kernel, everything works.

Signed-off-by: Prem Mallappa 
Cc: linux-mips 
Patchwork: http://patchwork.linux-mips.org/patch/5805/
Signed-off-by: Ralf Baechle