<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/arch/mips/kernel/branch.c, branch linux-3.10.y</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>MIPS: Actually decode JALX in `__compute_return_epc_for_insn'</title>
<updated>2017-11-01T21:12:44+00:00</updated>
<author>
<name>Maciej W. Rozycki</name>
<email>macro@imgtec.com</email>
</author>
<published>2017-06-15T23:06:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=6aa23d16b4dab21974ac5fcf46ac75a888006bc7'/>
<id>6aa23d16b4dab21974ac5fcf46ac75a888006bc7</id>
<content type='text'>
commit a9db101b735a9d49295326ae41f610f6da62b08c upstream.

Complement commit fb6883e5809c ("MIPS: microMIPS: Support handling of
delay slots.") and actually decode the regular MIPS JALX major
instruction opcode, the handling of which has been added with the said
commit for EPC calculation in `__compute_return_epc_for_insn'.

Fixes: fb6883e5809c ("MIPS: microMIPS: Support handling of delay slots.")
Signed-off-by: Maciej W. Rozycki &lt;macro@imgtec.com&gt;
Cc: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org # 3.9+
Patchwork: https://patchwork.linux-mips.org/patch/16394/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Signed-off-by: Willy Tarreau &lt;w@1wt.eu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit a9db101b735a9d49295326ae41f610f6da62b08c upstream.

Complement commit fb6883e5809c ("MIPS: microMIPS: Support handling of
delay slots.") and actually decode the regular MIPS JALX major
instruction opcode, the handling of which has been added with the said
commit for EPC calculation in `__compute_return_epc_for_insn'.

Fixes: fb6883e5809c ("MIPS: microMIPS: Support handling of delay slots.")
Signed-off-by: Maciej W. Rozycki &lt;macro@imgtec.com&gt;
Cc: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org # 3.9+
Patchwork: https://patchwork.linux-mips.org/patch/16394/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Signed-off-by: Willy Tarreau &lt;w@1wt.eu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Send SIGILL for BPOSGE32 in `__compute_return_epc_for_insn'</title>
<updated>2017-11-01T21:12:43+00:00</updated>
<author>
<name>Maciej W. Rozycki</name>
<email>macro@imgtec.com</email>
</author>
<published>2017-06-15T23:08:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=6c176369e70376d26e2de758401176a8342d7af5'/>
<id>6c176369e70376d26e2de758401176a8342d7af5</id>
<content type='text'>
commit 7b82c1058ac1f8f8b9f2b8786b1f710a57a870a8 upstream.

Fix commit e50c0a8fa60d ("Support the MIPS32 / MIPS64 DSP ASE.") and
send SIGILL rather than SIGBUS whenever an unimplemented BPOSGE32 DSP
ASE instruction has been encountered in `__compute_return_epc_for_insn'
as our Reserved Instruction exception handler would in response to an
attempt to actually execute the instruction.  Sending SIGBUS only makes
sense for the unaligned PC case, since moved to `__compute_return_epc'.
Adjust function documentation accordingly, correct formatting and use
`pr_info' rather than `printk' as the other exit path already does.

Fixes: e50c0a8fa60d ("Support the MIPS32 / MIPS64 DSP ASE.")
Signed-off-by: Maciej W. Rozycki &lt;macro@imgtec.com&gt;
Cc: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org # 2.6.14+
Patchwork: https://patchwork.linux-mips.org/patch/16396/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Signed-off-by: Willy Tarreau &lt;w@1wt.eu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 7b82c1058ac1f8f8b9f2b8786b1f710a57a870a8 upstream.

Fix commit e50c0a8fa60d ("Support the MIPS32 / MIPS64 DSP ASE.") and
send SIGILL rather than SIGBUS whenever an unimplemented BPOSGE32 DSP
ASE instruction has been encountered in `__compute_return_epc_for_insn'
as our Reserved Instruction exception handler would in response to an
attempt to actually execute the instruction.  Sending SIGBUS only makes
sense for the unaligned PC case, since moved to `__compute_return_epc'.
Adjust function documentation accordingly, correct formatting and use
`pr_info' rather than `printk' as the other exit path already does.

Fixes: e50c0a8fa60d ("Support the MIPS32 / MIPS64 DSP ASE.")
Signed-off-by: Maciej W. Rozycki &lt;macro@imgtec.com&gt;
Cc: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org # 2.6.14+
Patchwork: https://patchwork.linux-mips.org/patch/16396/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Signed-off-by: Willy Tarreau &lt;w@1wt.eu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: MIPS16e: Support handling of delay slots.</title>
<updated>2013-05-09T15:55:20+00:00</updated>
<author>
<name>Steven J. Hill</name>
<email>Steven.Hill@imgtec.com</email>
</author>
<published>2013-03-25T18:45:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=8508488fe7028b95bc86c7447c205fbc765cc4cf'/>
<id>8508488fe7028b95bc86c7447c205fbc765cc4cf</id>
<content type='text'>
Add logic needed to properly calculate exceptions for delay slots
when in MIPS16e mode.

Signed-off-by: Steven J. Hill &lt;Steven.Hill@imgtec.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add logic needed to properly calculate exceptions for delay slots
when in MIPS16e mode.

Signed-off-by: Steven J. Hill &lt;Steven.Hill@imgtec.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: microMIPS: Support handling of delay slots.</title>
<updated>2013-05-09T15:55:18+00:00</updated>
<author>
<name>Leonid Yegoshin</name>
<email>Leonid.Yegoshin@imgtec.com</email>
</author>
<published>2013-03-25T18:08:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=fb6883e5809c08e43de23581759af4570ca91b0f'/>
<id>fb6883e5809c08e43de23581759af4570ca91b0f</id>
<content type='text'>
Add logic needed to properly calculate exceptions for delay slots
when in microMIPS mode.

Signed-off-by: Leonid Yegoshin &lt;Leonid.Yegoshin@imgtec.com&gt;
Signed-off-by: Steven J. Hill &lt;Steven.Hill@imgtec.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add logic needed to properly calculate exceptions for delay slots
when in microMIPS mode.

Signed-off-by: Leonid Yegoshin &lt;Leonid.Yegoshin@imgtec.com&gt;
Signed-off-by: Steven J. Hill &lt;Steven.Hill@imgtec.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Whitespace cleanup.</title>
<updated>2013-02-01T09:00:22+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2013-01-22T11:59:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=7034228792cc561e79ff8600f02884bd4c80e287'/>
<id>7034228792cc561e79ff8600f02884bd4c80e287</id>
<content type='text'>
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS Kprobes: Refactor branch emulation</title>
<updated>2011-12-07T22:04:03+00:00</updated>
<author>
<name>Maneesh Soni</name>
<email>manesoni@cisco.com</email>
</author>
<published>2011-11-08T11:37:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=d8d4e3ae0b5c179c0bfd3f0af5b352d13bea9cfa'/>
<id>d8d4e3ae0b5c179c0bfd3f0af5b352d13bea9cfa</id>
<content type='text'>
This patch refactors MIPS branch emulation code so as to allow skipping
delay slot instruction in case of branch likely instructions when branch is
not taken. This is useful for keeping the code common for use cases like
kprobes where one would like to handle the branch instructions keeping the
delay slot instuction also in picture for branch likely instructions. Also
allow emulation when instruction to be decoded is not at pt_regs-&gt;cp0_epc
as in case of kprobes where pt_regs-&gt;cp0_epc points to the breakpoint
instruction.

The patch also exports the function for modules.

Signed-off-by: Maneesh Soni &lt;manesoni@cisco.com&gt;
Signed-off-by: Victor Kamensky &lt;kamensky@cisco.com&gt;
Cc: David Daney &lt;david.daney@cavium.com&gt;
Cc: ananth@in.ibm.com
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2913/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch refactors MIPS branch emulation code so as to allow skipping
delay slot instruction in case of branch likely instructions when branch is
not taken. This is useful for keeping the code common for use cases like
kprobes where one would like to handle the branch instructions keeping the
delay slot instuction also in picture for branch likely instructions. Also
allow emulation when instruction to be decoded is not at pt_regs-&gt;cp0_epc
as in case of kprobes where pt_regs-&gt;cp0_epc points to the breakpoint
instruction.

The patch also exports the function for modules.

Signed-off-by: Maneesh Soni &lt;manesoni@cisco.com&gt;
Signed-off-by: Victor Kamensky &lt;kamensky@cisco.com&gt;
Cc: David Daney &lt;david.daney@cavium.com&gt;
Cc: ananth@in.ibm.com
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2913/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Sanitize restart logics</title>
<updated>2010-10-18T15:59:02+00:00</updated>
<author>
<name>Al Viro</name>
<email>viro@ftp.linux.org.uk</email>
</author>
<published>2010-09-28T17:50:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=8f5a00eb422ed86e77bb8f67e08b9fe6d30f679a'/>
<id>8f5a00eb422ed86e77bb8f67e08b9fe6d30f679a</id>
<content type='text'>
Put the original syscall number into -&gt;regs[0] when we leave syscall
with error.  Use it in restart logics.  Everything else will have
it 0 since we pass through SAVE_SOME on all the ways in.  Note that
in places like bad_stack and inllegal_syscall we leave it 0 - it's not
restartable.

Signed-off-by: Al Viro &lt;viro@zeniv.linux.org.uk&gt;
Cc: linux-kernel@vger.kernel.org
Cc: linux-arch@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1698/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Put the original syscall number into -&gt;regs[0] when we leave syscall
with error.  Use it in restart logics.  Everything else will have
it 0 since we pass through SAVE_SOME on all the ways in.  Note that
in places like bad_stack and inllegal_syscall we leave it 0 - it's not
restartable.

Signed-off-by: Al Viro &lt;viro@zeniv.linux.org.uk&gt;
Cc: linux-kernel@vger.kernel.org
Cc: linux-arch@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1698/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS:  Compute branch returns for Cavium OCTEON specific branch instructions.</title>
<updated>2009-01-11T09:57:24+00:00</updated>
<author>
<name>David Daney</name>
<email>ddaney@caviumnetworks.com</email>
</author>
<published>2008-12-11T23:33:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=126336f065e5d80bd2f4c3199df8a573eb0abcf7'/>
<id>126336f065e5d80bd2f4c3199df8a573eb0abcf7</id>
<content type='text'>
For Cavium OCTEON, compute the return epc value for OCTEON specific
branch instructions.

Signed-off-by: Tomaso Paoletti &lt;tpaoletti@caviumnetworks.com&gt;
Signed-off-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For Cavium OCTEON, compute the return epc value for OCTEON specific
branch instructions.

Signed-off-by: Tomaso Paoletti &lt;tpaoletti@caviumnetworks.com&gt;
Signed-off-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] Add some __user tags</title>
<updated>2007-07-13T16:40:01+00:00</updated>
<author>
<name>Atsushi Nemoto</name>
<email>anemo@mba.ocn.ne.jp</email>
</author>
<published>2007-07-13T14:02:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=5e0373b8e449b0c72495a6d8401c53f678b71988'/>
<id>5e0373b8e449b0c72495a6d8401c53f678b71988</id>
<content type='text'>
Signed-off-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] Unify mips_fpu_soft_struct and mips_fpu_hard_structs.</title>
<updated>2006-06-19T16:39:18+00:00</updated>
<author>
<name>Atsushi Nemoto</name>
<email>anemo@mba.ocn.ne.jp</email>
</author>
<published>2006-05-15T16:26:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=eae89076e696f51762d81d6e2538c3beb59fa7bd'/>
<id>eae89076e696f51762d81d6e2538c3beb59fa7bd</id>
<content type='text'>
The struct mips_fpu_soft_struct and mips_fpu_hard_struct are
completely same now and the kernel fpu emulator assumes that.  This
patch unifies them to mips_fpu_struct and get rid of mips_fpu_union.

Signed-off-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The struct mips_fpu_soft_struct and mips_fpu_hard_struct are
completely same now and the kernel fpu emulator assumes that.  This
patch unifies them to mips_fpu_struct and get rid of mips_fpu_union.

Signed-off-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
