linux-stable.git/arch/mips/include/asm/bitops.h, branch linux-3.19.y

MIPS: Fix microMIPS LL/SC immediate offsets

2014-11-24T06:45:36+00:00

In the microMIPS encoding some memory access instructions have their
immediate offset reduced to 12 bits only.  That does not match the GCC
`R' constraint we use in some places to satisfy the requirement,
resulting in build failures like this:

{standard input}: Assembler messages:
{standard input}:720: Error: macro used $at after ".set noat"
{standard input}:720: Warning: macro instruction expanded into multiple instructions

Fix the problem by defining a macro, `GCC_OFF12_ASM', that expands to
the right constraint depending on whether microMIPS or standard MIPS
code is produced.  Also apply the fix to where `m' is used as in the
worst case this change does nothing, e.g. where the pointer was already
in a register such as a function argument and no further offset was
requested, and in the best case it avoids an extraneous sequence of up
to two instructions to load the high 20 bits of the address in the LL/SC
loop.  This reduces the risk of lock contention that is the higher the
more instructions there are in the critical section between LL and SC.

Strictly speaking we could just bulk-replace `R' with `ZC' as the latter
constraint adjusts automatically depending on the ISA selected.
However it was only introduced with GCC 4.9 and we keep supporing older
compilers for the standard MIPS configuration, hence the slightly more
complicated approach I chose.

The choice of a zero-argument function-like rather than an object-like
macro was made so that it does not look like a function call taking the
C expression used for the constraint as an argument.  This is so as not
to confuse the reader or formatting checkers like `checkpatch.pl' and
follows previous practice.

Signed-off-by: Maciej W. Rozycki 
Signed-off-by: Steven J. Hill 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8482/
Signed-off-by: Ralf Baechle

MIPS: asm/bitops.h: Guard CLZ with `.set mips32'

2014-07-30T13:51:55+00:00

This fixes:

{standard input}: Assembler messages:
{standard input}:145: Error: opcode not supported on this processor: vr5000 (mips4) `clz $2,$2'
{standard input}:920: Error: opcode not supported on this processor: vr5000 (mips4) `clz $7,$9'
{standard input}:1797: Error: opcode not supported on this processor: vr5000 (mips4) `clz $7,$7'
{standard input}:1851: Error: opcode not supported on this processor: vr5000 (mips4) `clz $7,$7'
{standard input}:2831: Error: opcode not supported on this processor: vr5000 (mips4) `clz $7,$7'
{standard input}:4209: Error: opcode not supported on this processor: vr5000 (mips4) `clz $7,$7'
{standard input}:4329: Error: opcode not supported on this processor: vr5000 (mips4) `clz $2,$2'
make[2]: *** [arch/mips/mm/tlbex.o] Error 1

which triggered due to a regression causing the file to be built with
`-march=r5000' rather than `-march=sb1', fixed separately.  Nevertheless
the error should not happen, the other uses of CLZ are appropriately
guarded.  This change copies the arrangement from one of those other
places.

Signed-off-by: Maciej W. Rozycki 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7222/
Signed-off-by: Ralf Baechle

arch,mips: Convert smp_mb__*()

2014-04-18T12:20:38+00:00

MIPS is interesting and has hardware variants that reorder over ll/sc
as well as those that do not.

Implement the 2 new barrier functions as per the old barriers.

Signed-off-by: Peter Zijlstra 
Acked-by: Paul E. McKenney 
Link: http://lkml.kernel.org/n/tip-9ph49jbae3hol9v721sbc2g6@git.kernel.org
Cc: Linus Torvalds 
Cc: Maciej W. Rozycki" 
Cc: Ralf Baechle 
Cc: Will Deacon 
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Signed-off-by: Ingo Molnar

MIPS: Fix gigaton of warning building with microMIPS.

2014-03-31T16:17:12+00:00

With binutils 2.24 the attempt to switch with microMIPS mode to MIPS III
mode through .set mips3 results in *lots* of warnings like

{standard input}: Assembler messages:
{standard input}:397: Warning: the 64-bit MIPS architecture does not support the `smartmips' extension

during a kernel build.  Fixed by using .set arch=r4000 instead.

This breaks support for building the kernel with binutils 2.13 which
was supported for 32 bit kernels only anyway and 2.14 which was a bad
vintage for MIPS anyway.

Signed-off-by: Ralf Baechle

MIPS: Whitespace cleanup.

2013-02-01T09:00:22+00:00

Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle

MIPS: Remove irqflags.h dependency from bitops.h

2012-11-09T09:59:10+00:00

The "else clause" of most functions in bitops.h invoked
raw_local_irq_{save,restore}() and in doing so had a dependency on
irqflags.h.  This fix moves said code to bitops.c, removing the
dependency.

Signed-off-by: Jim Quinlan 
Cc: linux-mips@linux-mips.org
Cc: David Daney 
Cc: Kevin Cernekee cernekee@gmail.com
Cc: Jim Quinlan 
Patchwork: https://patchwork.linux-mips.org/patch/4320/
Signed-off-by: Ralf Baechle

MIPS: bitops.h: Change use of 'unsigned short' to 'int'

2012-11-09T09:58:50+00:00

[ralf@linux-mips.org: No functional change but it's consistent with how
use types elsewhere in the code.]

Signed-off-by: Jim Quinlan 
Cc: linux-mips@linux-mips.org
Cc: David Daney 
Cc: Kevin Cernekee cernekee@gmail.com
Cc: Jim Quinlan 
Patchwork: https://patchwork.linux-mips.org/patch/4319/
Signed-off-by: Ralf Baechle

mips: fix bug.h build regression

2012-07-19T01:35:57+00:00

Commit 377780887 ("bug.h: need linux/kernel.h for TAINT_WARN.") broke
all MIPS builds:

    CC      arch/mips/kernel/machine_kexec.o
  include/linux/log2.h: In function '__ilog2_u32':
  include/linux/log2.h:34:2: error: implicit declaration of function 'fls' [-Werror=implicit-function-declaration]
  include/linux/log2.h: In function '__ilog2_u64':
  include/linux/log2.h:42:2: error: implicit declaration of function 'fls64' [-Werror=implicit-function-declaration]
  ...

Signed-off-by: Yoichi Yuasa 
Tested-by: John Crispin 
Cc: Ralf Baechle 
Cc: David Daney 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

bitops: remove minix bitops from asm/bitops.h

2011-03-24T02:46:22+00:00

minix bit operations are only used by minix filesystem and useless by
other modules.  Because byte order of inode and block bitmaps is different
on each architecture like below:

m68k:
	big-endian 16bit indexed bitmaps

h8300, microblaze, s390, sparc, m68knommu:
	big-endian 32 or 64bit indexed bitmaps

m32r, mips, sh, xtensa:
	big-endian 32 or 64bit indexed bitmaps for big-endian mode
	little-endian bitmaps for little-endian mode

Others:
	little-endian bitmaps

In order to move minix bit operations from asm/bitops.h to architecture
independent code in minix filesystem, this provides two config options.

CONFIG_MINIX_FS_BIG_ENDIAN_16BIT_INDEXED is only selected by m68k.
CONFIG_MINIX_FS_NATIVE_ENDIAN is selected by the architectures which use
native byte order bitmaps (h8300, microblaze, s390, sparc, m68knommu,
m32r, mips, sh, xtensa).  The architectures which always use little-endian
bitmaps do not select these options.

Finally, we can remove minix bit operations from asm/bitops.h for all
architectures.

Signed-off-by: Akinobu Mita 
Acked-by: Arnd Bergmann 
Acked-by: Greg Ungerer 
Cc: Geert Uytterhoeven 
Cc: Roman Zippel 
Cc: Andreas Schwab 
Cc: Martin Schwidefsky 
Cc: Heiko Carstens 
Cc: Yoshinori Sato 
Cc: Michal Simek 
Cc: "David S. Miller" 
Cc: Hirokazu Takata 
Acked-by: Ralf Baechle 
Acked-by: Paul Mundt 
Cc: Chris Zankel 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

bitops: remove ext2 non-atomic bitops from asm/bitops.h

2011-03-24T02:46:21+00:00

As the result of conversions, there are no users of ext2 non-atomic bit
operations except for ext2 filesystem itself.  Now we can put them into
architecture independent code in ext2 filesystem, and remove from
asm/bitops.h for all architectures.

Signed-off-by: Akinobu Mita 
Cc: Jan Kara 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds