linux-stable.git/arch/mips/dec/setup.c, branch v3.2

MIPS: Mark cascade and low level interrupts IRQF_NO_THREAD

2011-09-21T15:52:15+00:00

Mark interrupts with no_action handler, cascade interrupts, low level
interrupts (bus error, halt ..) with IRQF_NO_THREAD to exclude them
from forced threading.

Signed-off-by: Wu Zhangjin 
Signed-off-by: Thomas Gleixner 
Cc: linux-mips@linux-mips.org
Cc: Wu Zhangjin 
Signed-off-by: Ralf Baechle

MIPS: Add missing #inclusions of

2010-10-07T13:08:54+00:00

Add missing #inclusions of  to a whole bunch of files that should
really include it.  Note that this can replace #inclusions of .

This is required for the patch to sort out irqflags handling function naming to
compile on MIPS.

The problem is that these files require access to things like setup_irq() -
which isn't available by #including 

Signed-off-by: David Howells 
Acked-by: Ralf Baechle

[MIPS] Deforest the function pointer jungle in the time code.

2007-10-11T22:46:08+00:00

Hard to follow who is pointing what to where and why so it's simply getting
in the way of the time code renovation.

Signed-off-by: Ralf Baechle

[MIPS] DEC: Initialise ioasic_ssr_lock

2007-09-19T18:33:14+00:00

Fix the definition of the ioasic_ssr_lock spinlock to include a proper 
initialisation.

Signed-off-by: Maciej W. Rozycki 
Signed-off-by: Ralf Baechle

[TC] TURBOchannel support for the DECstation

2007-02-09T16:23:16+00:00

This is the platform-specific part of TURBOchannel bus support for the
DECstation.  It implements determining whether the bus is actually there,
getting bus parameters, IRQ assignments for devices and protected accesses
to possibly unoccupied slots that may trigger bus error exceptions.

Signed-off-by: Maciej W. Rozycki 
Signed-off-by: Andrew Morton 
Signed-off-by: Ralf Baechle

[MIPS] Define MIPS_CPU_IRQ_BASE in generic header

2007-02-06T16:53:08+00:00

The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all
platforms and are same value on most platforms (0 or 16, depends on
CONFIG_I8259).  Define them in asm-mips/mach-generic/irq.h and make
them customizable.  This will save a few cycle on each CPU interrupt.

A good side effect is removing some dependencies to MALTA in generic
SMTC code.

Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq
mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing
them might cause some header dependency problem and there seems no
good reason to customize it.  So currently only VR41XX is using custom
MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259.

Testing this patch on those platforms is greatly appreciated.  Thank
you.

Signed-off-by: Atsushi Nemoto 
Signed-off-by: Ralf Baechle

[MIPS] do_IRQ cleanup

2006-11-30T01:14:49+00:00

Now we have both function and macro version of do_IRQ() and the former
is used only by DEC and non-preemptive kernel.  This patch makes
everyone use the macro version and removes the function version.

Signed-off-by: Atsushi Nemoto 
Signed-off-by: Ralf Baechle

[MIPS] DEC: pt_regs fixes for dec_intr_halt.

2006-10-08T23:15:27+00:00

Signed-off-by: Ralf Baechle

[MIPS] Replace board_timer_setup function pointer by plat_timer_setup.

2006-07-13T20:26:17+00:00

Signed-off-by: Ralf Baechle 

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[PATCH] irq-flags: MIPS: Use the new IRQF_ constants

2006-07-02T20:58:47+00:00

Use the new IRQF_ constants and remove the SA_INTERRUPT define

Signed-off-by: Thomas Gleixner 
Cc: Ingo Molnar 
Cc: "David S. Miller" 
Cc: Benjamin Herrenschmidt 
Cc: Ralf Baechle 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds