linux-stable.git/arch/mips/boot, branch v5.8

MIPS: ingenic: gcw0: Fix HP detection GPIO.

2020-06-25T08:18:22+00:00

Previously marked as active high, but is in reality active low.

Cc: stable@vger.kernel.org
Fixes: b1bfdb660516 ("MIPS: ingenic: DTS: Update GCW0 support")
Signed-off-by: João H. Spies 
Tested-by: Paul Cercueil 
Reviewed-by: Paul Cercueil 
Signed-off-by: Thomas Bogendoerfer

MIPS: DTS: Fix build errors used with various configs

2020-05-28T07:35:47+00:00

If CONFIG_MIPS_MALTA is not set but CONFIG_LEGACY_BOARD_SEAD3 is set,
the subdir arch/mips/boot/dts/mti will not be built, so the sead3.dts
which depends on CONFIG_LEGACY_BOARD_SEAD3 in this subdir is also not
built, and then there exists the following build error, fix it.

  LD      .tmp_vmlinux.kallsyms1
arch/mips/generic/board-sead3.o:(.mips.machines.init+0x4): undefined reference to `__dtb_sead3_begin'
Makefile:1106: recipe for target 'vmlinux' failed
make: *** [vmlinux] Error 1

Additionally, add CONFIG_FIT_IMAGE_FDT_BOSTON check for subdir img to
fix the following build error when CONFIG_MACH_PISTACHIO is not set but
CONFIG_FIT_IMAGE_FDT_BOSTON is set.

FATAL ERROR: Couldn't open "boot/dts/img/boston.dtb": No such file or directory

Reported-by: kbuild test robot 
Reported-by: Guenter Roeck 
Fixes: 41528ba6afe6 ("MIPS: DTS: Only build subdir of current platform")
Signed-off-by: Tiezhu Yang 
Signed-off-by: Thomas Bogendoerfer

MIPS: ingenic: Add support for GCW Zero prototype

2020-05-27T11:04:09+00:00

Add support for the GCW Zero prototype. The only (?) difference is that
it only has 256 MiB of RAM, compared to the 512 MiB of RAM of the retail
device.

Signed-off-by: Paul Cercueil 
Signed-off-by: Thomas Bogendoerfer

MIPS: ingenic: DTS: Add memory info of GCW Zero

2020-05-27T11:03:56+00:00

Add memory info of the GCW Zero in its devicetree. The bootloader
generally provides this information, but since it is fixed to 512 MiB,
it doesn't hurt to have it in devicetree. It allows the kernel to boot
without any parameter passed as argument.

Signed-off-by: Paul Cercueil 
Signed-off-by: Thomas Bogendoerfer

MIPS: DTS: Loongson64: Add PCI Controller Node

2020-05-27T10:53:44+00:00

Add PCI Host controller node for Loongson64 with RS780E PCH dts.
Note that PCI interrupts are probed via legacy way, as different
machine have different interrupt arrangement, we can't cover all
of them in dt.

Signed-off-by: Jiaxun Yang 
Signed-off-by: Thomas Bogendoerfer

MIPS: DTS: Only build subdir of current platform

2020-05-24T07:24:49+00:00

Add config check in Makefile to only build the subdir of current platform.

E.g. without this patch:

  AR      arch/mips/built-in.a
  AR      arch/mips/boot/dts/brcm/built-in.a
  AR      arch/mips/boot/dts/cavium-octeon/built-in.a
  AR      arch/mips/boot/dts/img/built-in.a
  AR      arch/mips/boot/dts/ingenic/built-in.a
  AR      arch/mips/boot/dts/lantiq/built-in.a
  DTC     arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dtb
  DTB     arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dtb.S
  AS      arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dtb.o
  DTC     arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dtb
  DTB     arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dtb.S
  AS      arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dtb.o
  AR      arch/mips/boot/dts/loongson/built-in.a
  AR      arch/mips/boot/dts/mscc/built-in.a
  AR      arch/mips/boot/dts/mti/built-in.a
  AR      arch/mips/boot/dts/netlogic/built-in.a
  AR      arch/mips/boot/dts/ni/built-in.a
  AR      arch/mips/boot/dts/pic32/built-in.a
  AR      arch/mips/boot/dts/qca/built-in.a
  AR      arch/mips/boot/dts/ralink/built-in.a
  AR      arch/mips/boot/dts/xilfpga/built-in.a
  AR      arch/mips/boot/dts/built-in.a

With this patch:

  AR      arch/mips/built-in.a
  DTC     arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dtb
  DTB     arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dtb.S
  AS      arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dtb.o
  DTC     arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dtb
  DTB     arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dtb.S
  AS      arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dtb.o
  AR      arch/mips/boot/dts/loongson/built-in.a
  AR      arch/mips/boot/dts/built-in.a

Signed-off-by: Tiezhu Yang 
Signed-off-by: Thomas Bogendoerfer

MIPS: ath79: ar9331: rename uart to serial node

2020-05-15T07:33:46+00:00

schema violation was detected by the dtbs_check

Signed-off-by: Oleksij Rempel 
Signed-off-by: Thomas Bogendoerfer

MIPS: ath79: ar9331_dpt_module: update led nodes

2020-05-15T07:33:34+00:00

Fit led nodes to the latest naming schema.

Signed-off-by: Oleksij Rempel 
Signed-off-by: Thomas Bogendoerfer

MIPS: dts: mscc: Updated changed name for miim pinctrl function

2020-05-13T22:27:19+00:00

This is an add-on patch to the main SoC Sparx5 series
(Message-ID: <20200513125532.24585-1-lars.povlsen@microchip.com>).

This changes the miim pinctrl function name from "miim1" to "miim" due
to refactoring in the driver, obsoleting the instance number.

The change in the driver was to better fit new platforms, as the
instance number is redundant information. Specifically, support for
the Microchip Sparx5 SoC is being submitted, where this change became
necessary.

Reviewed-by: Alexandre Belloni 
Signed-off-by: Lars Povlsen 
Acked-by: Alexandre Belloni 
Signed-off-by: Thomas Bogendoerfer

MIPS: Truncate link address into 32bit for 32bit kernel

2020-05-07T08:31:01+00:00

LLD failed to link vmlinux with 64bit load address for 32bit ELF
while bfd will strip 64bit address into 32bit silently.
To fix LLD build, we should truncate load address provided by platform
into 32bit for 32bit kernel.

Signed-off-by: Jiaxun Yang 
Link: https://github.com/ClangBuiltLinux/linux/issues/786
Link: https://sourceware.org/bugzilla/show_bug.cgi?id=25784
Reviewed-by: Fangrui Song 
Reviewed-by: Kees Cook 
Tested-by: Nathan Chancellor 
Cc: Maciej W. Rozycki 
Tested-by: Nick Desaulniers 
Signed-off-by: Thomas Bogendoerfer