linux-stable.git/arch/blackfin/kernel/setup.c, branch linux-3.3.y

bf54x: get mem size: missing break in switch

2012-01-09T02:26:15+00:00

Signed-off-by: Steven Miao 
Signed-off-by: Bob Liu

Blackfin: optimize double fault boot checking

2011-07-23T05:10:43+00:00

This moves the double fault data used at boot time into a single struct
which can then easily be addressed with indexed loads rather than having
to explicitly load multiple addresses.

Signed-off-by: Mike Frysinger

Blackfin: convert old cpumask API to new one

2011-05-25T12:24:11+00:00

old cpu_xxx() APIs is planned to removed later. then, converted.

Signed-off-by: KOSAKI Motohiro 
Signed-off-by: Mike Frysinger

Blackfin: optimize MMR reads during startup a bit

2011-05-25T12:13:43+00:00

Since the value of these MMRs aren't changing, store the value in a local
variable and work off of that.  This avoids multiple MMR reads which are
implicitly forced by the volatile markings.

Signed-off-by: Mike Frysinger

Blackfin: move internal irq prototypes out of global namespace

2011-05-25T12:13:43+00:00

These are only used in a few internal Blackfin places, so move the irq
prototypes out of the global header and into the internal irq one.  No
functional changes other than shuffling locales.

Signed-off-by: Mike Frysinger

Blackfin: bf51x/bf52x: fix typo in hysteresis MMR names

2011-05-25T12:13:42+00:00

Signed-off-by: Mike Frysinger

Blackfin: SMP: drop unused blackfin_cpudata.idle pointer

2011-05-25T12:13:42+00:00

Not sure when we stopped using this field, but nothing in the tree uses
this now, so punt it.

Signed-off-by: Mike Frysinger

Blackfin: SMP: fix cpudata cache setup

2011-05-25T12:13:42+00:00

After some cache setup reordering changesets, the blackfin_cpudata init
was left behind.  While cpu0's data was correct, cpu1's data was not.
Not that big of a deal as these are only used in the cpuinfo output, but
should still be fixed.  So move the setup of these fields to the common
cache setup function to avoid this happening again in the future.

Signed-off-by: Mike Frysinger

Blackfin: clean up /proc/cpuinfo output

2011-05-25T12:13:42+00:00

The smp flush lines are too long and have too many newlines, so scale
them back to match the other lines.

The %p modifier shows "(null)" for 0, so use %08x instead.

Signed-off-by: Mike Frysinger

Blackfin: SMP: work around anomaly 05000491

2011-03-18T08:01:04+00:00

In order to safely work around anomaly 05000491, we have to execute IFLUSH
from L1 instruction sram.  The trouble with multi-core systems is that all
L1 sram is visible only to the active core.  So we can't just place the
functions into L1 and call it directly.  We need to setup a jump table and
place the entry point in external memory.  This will call the right func
based on the active core.

In the process, convert from the manual relocation of a small bit of code
into Core B's L1 to the more general framework we already have in place
for loading arbitrary pieces of code into L1.

Signed-off-by: Sonic Zhang 
Signed-off-by: Mike Frysinger