<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/arch/arm64, branch v4.1</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>Merge tag 'v4.1-next-arm64-fixes' of https://github.com/mbgg/linux-mediatek into fixes</title>
<updated>2015-06-01T15:06:51+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2015-06-01T15:06:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=9947c34cf7921722b82440a7917ce219eefa5241'/>
<id>9947c34cf7921722b82440a7917ce219eefa5241</id>
<content type='text'>
- dts: mt8173: fix compatible string

* tag 'v4.1-next-arm64-fixes' of https://github.com/mbgg/linux-mediatek:
  arm64: dts: mt8173-evb: fix model name
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- dts: mt8173: fix compatible string

* tag 'v4.1-next-arm64-fixes' of https://github.com/mbgg/linux-mediatek:
  arm64: dts: mt8173-evb: fix model name
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: mt8173-evb: fix model name</title>
<updated>2015-06-01T09:29:15+00:00</updated>
<author>
<name>Yingjoe Chen</name>
<email>yingjoe.chen@mediatek.com</email>
</author>
<published>2015-05-15T15:13:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=692ef3ee36833b6098a352c079d3cea8fc6ed3ef'/>
<id>692ef3ee36833b6098a352c079d3cea8fc6ed3ef</id>
<content type='text'>
Model name in mt8173-evb.dts doesn't follow dts convention (it should
be human readable model name). Fix it.

Fixes: b3a372484157 ("arm64: dts: Add mediatek MT8173 SoC and evaluation board dts and Makefile")
Cc: &lt;stable@vger.kernel.org&gt; # v4.0+
Signed-off-by: Yingjoe Chen &lt;yingjoe.chen@mediatek.com&gt;
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Model name in mt8173-evb.dts doesn't follow dts convention (it should
be human readable model name). Fix it.

Fixes: b3a372484157 ("arm64: dts: Add mediatek MT8173 SoC and evaluation board dts and Makefile")
Cc: &lt;stable@vger.kernel.org&gt; # v4.0+
Signed-off-by: Yingjoe Chen &lt;yingjoe.chen@mediatek.com&gt;
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2015-05-16T22:33:25+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-05-16T22:33:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=d66102706621949e3ac7db14448eb65ea2abfcaa'/>
<id>d66102706621949e3ac7db14448eb65ea2abfcaa</id>
<content type='text'>
Pull ARM SoC fixes from Arnd Bergmann:
 "Nothing frightening this time, just smaller fixes in a number of
  places.

  The other changes contained here are:

   MAINTAINERS file updates:

   - The mach-gemini maintainer is back in action and has a new git tree

   - Krzysztof Kozlowski has volunteered to be a new co-maintainer for
     the samsung platforms

   - updates to the files that belong to Marvell mvebu

  Bug fixes:

   - The largest changes are on omap2, but are only to avoid some
     harmless warnings and to fix reset on omap4

   - a small regression fix on tegra

   - multiple fixes for incorrect IRQ affinity on vexpress

   - the missing system controller on arm64 juno is added

   - one revert of a patch that was accidentally applied twice for
     mach-rockchip

   - two clock related DT fixes for mvebu

   - a workaround for suspend with old DT binaries on new exynos kernels

   - Another fix for suspend on exynos, needs to be backported"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (21 commits)
  MAINTAINERS: Add dts entries for some of the Marvell SoCs
  MAINTAINERS: ARM: EXYNOS: Add Krzysztof Kozlowski as co-maintainer
  ARM: EXYNOS: Use of_machine_is_compatible instead of soc_is_exynos4
  ARM: EXYNOS: Fix failed second suspend on Exynos4
  Revert "ARM: rockchip: fix undefined instruction of reset_ctrl_regs"
  ARM: EXYNOS: Fix dereference of ERR_PTR returned by of_genpd_get_from_provider
  ARM: EXYNOS: Don't try to initialize suspend on old DT
  ARM: dts: Add keep-power-in-suspend to WiFi SDIO node for Peach Boards
  ARM: gemini: fix compiler warning due wrong data type
  ARM: vexpress/tc2: Add interrupt-affinity to the PMU node
  ARM: vexpress/ca9: Add interrupt-affinity to the PMU node
  ARM: vexpress/ca9: Add unified-cache property to l2 cache node
  ARM64: juno: add sp810 support and fix sp804 clock frequency
  ARM: Gemini: Maintainers update
  ARM: OMAP2+: Remove bogus struct clk comparison for timer clock
  ARM: dove: Add clock-names to CuBox Si5351 clk generator
  ARM: AM33xx+: hwmod: re-use omap4 implementations for reset functionality
  ARM: OMAP4+: PRM: add support for passing status register/bit info to reset
  ARM: AM43xx: hwmod: add VPFE hwmod entries
  ARM: mvebu: Fix the main PLL frequency on Armada 375, 38x and 39x SoCs
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull ARM SoC fixes from Arnd Bergmann:
 "Nothing frightening this time, just smaller fixes in a number of
  places.

  The other changes contained here are:

   MAINTAINERS file updates:

   - The mach-gemini maintainer is back in action and has a new git tree

   - Krzysztof Kozlowski has volunteered to be a new co-maintainer for
     the samsung platforms

   - updates to the files that belong to Marvell mvebu

  Bug fixes:

   - The largest changes are on omap2, but are only to avoid some
     harmless warnings and to fix reset on omap4

   - a small regression fix on tegra

   - multiple fixes for incorrect IRQ affinity on vexpress

   - the missing system controller on arm64 juno is added

   - one revert of a patch that was accidentally applied twice for
     mach-rockchip

   - two clock related DT fixes for mvebu

   - a workaround for suspend with old DT binaries on new exynos kernels

   - Another fix for suspend on exynos, needs to be backported"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (21 commits)
  MAINTAINERS: Add dts entries for some of the Marvell SoCs
  MAINTAINERS: ARM: EXYNOS: Add Krzysztof Kozlowski as co-maintainer
  ARM: EXYNOS: Use of_machine_is_compatible instead of soc_is_exynos4
  ARM: EXYNOS: Fix failed second suspend on Exynos4
  Revert "ARM: rockchip: fix undefined instruction of reset_ctrl_regs"
  ARM: EXYNOS: Fix dereference of ERR_PTR returned by of_genpd_get_from_provider
  ARM: EXYNOS: Don't try to initialize suspend on old DT
  ARM: dts: Add keep-power-in-suspend to WiFi SDIO node for Peach Boards
  ARM: gemini: fix compiler warning due wrong data type
  ARM: vexpress/tc2: Add interrupt-affinity to the PMU node
  ARM: vexpress/ca9: Add interrupt-affinity to the PMU node
  ARM: vexpress/ca9: Add unified-cache property to l2 cache node
  ARM64: juno: add sp810 support and fix sp804 clock frequency
  ARM: Gemini: Maintainers update
  ARM: OMAP2+: Remove bogus struct clk comparison for timer clock
  ARM: dove: Add clock-names to CuBox Si5351 clk generator
  ARM: AM33xx+: hwmod: re-use omap4 implementations for reset functionality
  ARM: OMAP4+: PRM: add support for passing status register/bit info to reset
  ARM: AM43xx: hwmod: add VPFE hwmod entries
  ARM: mvebu: Fix the main PLL frequency on Armada 375, 38x and 39x SoCs
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux</title>
<updated>2015-05-15T01:35:33+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-05-15T01:35:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=fc8c540b1d66fe5f44da916338423ec62946e8b5'/>
<id>fc8c540b1d66fe5f44da916338423ec62946e8b5</id>
<content type='text'>
Pull arm64 fixes from Will Deacon:

 - fix potential memory leak in perf PMU probing

 - BPF sign extension fix for 64-bit immediates

 - fix build failure with unusual configuration

 - revert unused and broken branch patching from alternative code

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: perf: fix memory leak when probing PMU PPIs
  arm64: bpf: fix signedness bug in loading 64-bit immediate
  arm64: mm: Fix build error with CONFIG_SPARSEMEM_VMEMMAP disabled
  Revert "arm64: alternative: Allow immediate branch as alternative instruction"
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull arm64 fixes from Will Deacon:

 - fix potential memory leak in perf PMU probing

 - BPF sign extension fix for 64-bit immediates

 - fix build failure with unusual configuration

 - revert unused and broken branch patching from alternative code

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: perf: fix memory leak when probing PMU PPIs
  arm64: bpf: fix signedness bug in loading 64-bit immediate
  arm64: mm: Fix build error with CONFIG_SPARSEMEM_VMEMMAP disabled
  Revert "arm64: alternative: Allow immediate branch as alternative instruction"
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: perf: fix memory leak when probing PMU PPIs</title>
<updated>2015-05-12T15:50:21+00:00</updated>
<author>
<name>Will Deacon</name>
<email>will.deacon@arm.com</email>
</author>
<published>2015-05-01T16:15:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=4801ba338acad2e69e905e0c537e8ba2682c4e65'/>
<id>4801ba338acad2e69e905e0c537e8ba2682c4e65</id>
<content type='text'>
Commit d795ef9aa831 ("arm64: perf: don't warn about missing
interrupt-affinity property for PPIs") added a check for PPIs so that
we avoid parsing the interrupt-affinity property for these naturally
affine interrupts.

Unfortunately, this check can trigger an early (successful) return and
we will leak the irqs array. This patch fixes the issue by reordering
the code so that the check is performed before any independent
allocation.

Reported-by: David Binderman &lt;dcb314@hotmail.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Commit d795ef9aa831 ("arm64: perf: don't warn about missing
interrupt-affinity property for PPIs") added a check for PPIs so that
we avoid parsing the interrupt-affinity property for these naturally
affine interrupts.

Unfortunately, this check can trigger an early (successful) return and
we will leak the irqs array. This patch fixes the issue by reordering
the code so that the check is performed before any independent
allocation.

Reported-by: David Binderman &lt;dcb314@hotmail.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM64: juno: add sp810 support and fix sp804 clock frequency</title>
<updated>2015-05-12T14:39:28+00:00</updated>
<author>
<name>Sudeep Holla</name>
<email>sudeep.holla@arm.com</email>
</author>
<published>2015-05-07T14:45:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=3bb1555c0d2df5b84da12d2b639aa89c45d141aa'/>
<id>3bb1555c0d2df5b84da12d2b639aa89c45d141aa</id>
<content type='text'>
The clock generator in IOFPGA generates the two source clocks: 32kHz and
1MHz for the SP810 System Controller.

The SP810 System Controller selects 32kHz or 1MHz as the sources for
TIM_CLK[3:0], the SP804 timer clocks. The powerup default is 32kHz but
the maximum of "refclk" and "timclk" is chosen by the SP810 driver.

This patch adds support for SP810 system controller and also fixes the
SP804 timer clock frequency.

However the SP804 driver needs to be enabled on ARM64 to test this,
which requires SP804 driver to be moved out of arch/arm.

Fixes: 71f867ec130e ("arm64: Add Juno board device tree.")
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Olof Johansson &lt;olof@lixom.net&gt;
Acked-by: Liviu Dudau &lt;Liviu.Dudau@arm.com&gt;
Signed-off-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The clock generator in IOFPGA generates the two source clocks: 32kHz and
1MHz for the SP810 System Controller.

The SP810 System Controller selects 32kHz or 1MHz as the sources for
TIM_CLK[3:0], the SP804 timer clocks. The powerup default is 32kHz but
the maximum of "refclk" and "timclk" is chosen by the SP810 driver.

This patch adds support for SP810 system controller and also fixes the
SP804 timer clock frequency.

However the SP804 driver needs to be enabled on ARM64 to test this,
which requires SP804 driver to be moved out of arch/arm.

Fixes: 71f867ec130e ("arm64: Add Juno board device tree.")
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Olof Johansson &lt;olof@lixom.net&gt;
Acked-by: Liviu Dudau &lt;Liviu.Dudau@arm.com&gt;
Signed-off-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6</title>
<updated>2015-05-11T18:05:13+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-05-11T18:05:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=9c922a55dbfff812e8becbcfd90d1ce856adb0d9'/>
<id>9c922a55dbfff812e8becbcfd90d1ce856adb0d9</id>
<content type='text'>
Pull crypto fixes from Herbert Xu:
 "This fixes a the implementation of CRC32 on arm64 where it incorrectly
  applied negation on the result.

  It also fixes the arm64 implementations of SHA/SHA256 where in some
  cases it may end up finalising the result twice"

* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
  crypto: arm64/sha2-ce - prevent asm code finalization in final() path
  crypto: arm64/sha1-ce - prevent asm code finalization in final() path
  crypto: arm64/crc32 - bring in line with generic CRC32
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull crypto fixes from Herbert Xu:
 "This fixes a the implementation of CRC32 on arm64 where it incorrectly
  applied negation on the result.

  It also fixes the arm64 implementations of SHA/SHA256 where in some
  cases it may end up finalising the result twice"

* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
  crypto: arm64/sha2-ce - prevent asm code finalization in final() path
  crypto: arm64/sha1-ce - prevent asm code finalization in final() path
  crypto: arm64/crc32 - bring in line with generic CRC32
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: bpf: fix signedness bug in loading 64-bit immediate</title>
<updated>2015-05-08T15:15:07+00:00</updated>
<author>
<name>Xi Wang</name>
<email>xi.wang@gmail.com</email>
</author>
<published>2015-05-08T05:39:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=1e4df6b7208140f3c49f316d33a409d3a161f350'/>
<id>1e4df6b7208140f3c49f316d33a409d3a161f350</id>
<content type='text'>
Consider "(u64)insn1.imm &lt;&lt; 32 | imm" in the arm64 JIT.  Since imm is
signed 32-bit, it is sign-extended to 64-bit, losing the high 32 bits.
The fix is to convert imm to u32 first, which will be zero-extended to
u64 implicitly.

Cc: Zi Shen Lim &lt;zlim.lnx@gmail.com&gt;
Cc: Alexei Starovoitov &lt;ast@plumgrid.com&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: &lt;stable@vger.kernel.org&gt;
Fixes: 30d3d94cc3d5 ("arm64: bpf: add 'load 64-bit immediate' instruction")
Signed-off-by: Xi Wang &lt;xi.wang@gmail.com&gt;
[will: removed non-arm64 bits and redundant casting]
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Consider "(u64)insn1.imm &lt;&lt; 32 | imm" in the arm64 JIT.  Since imm is
signed 32-bit, it is sign-extended to 64-bit, losing the high 32 bits.
The fix is to convert imm to u32 first, which will be zero-extended to
u64 implicitly.

Cc: Zi Shen Lim &lt;zlim.lnx@gmail.com&gt;
Cc: Alexei Starovoitov &lt;ast@plumgrid.com&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: &lt;stable@vger.kernel.org&gt;
Fixes: 30d3d94cc3d5 ("arm64: bpf: add 'load 64-bit immediate' instruction")
Signed-off-by: Xi Wang &lt;xi.wang@gmail.com&gt;
[will: removed non-arm64 bits and redundant casting]
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: arm64/sha2-ce - prevent asm code finalization in final() path</title>
<updated>2015-05-07T03:16:26+00:00</updated>
<author>
<name>Ard Biesheuvel</name>
<email>ard.biesheuvel@linaro.org</email>
</author>
<published>2015-05-06T13:54:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=ec59a65d694e5fd99d76565b93468c99ae8dff79'/>
<id>ec59a65d694e5fd99d76565b93468c99ae8dff79</id>
<content type='text'>
Ensure that the asm code finalization path is not triggered when
invoked via final(), since it already takes care of that itself.

Signed-off-by: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Ensure that the asm code finalization path is not triggered when
invoked via final(), since it already takes care of that itself.

Signed-off-by: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: arm64/sha1-ce - prevent asm code finalization in final() path</title>
<updated>2015-05-07T03:16:25+00:00</updated>
<author>
<name>Ard Biesheuvel</name>
<email>ard.biesheuvel@linaro.org</email>
</author>
<published>2015-05-06T13:54:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=bf7883ebcb9c0880b8f5d22c1435a3de15283f0a'/>
<id>bf7883ebcb9c0880b8f5d22c1435a3de15283f0a</id>
<content type='text'>
Ensure that the asm code finalization path is not triggered when
invoked via final(), since it already takes care of that itself.

Signed-off-by: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Ensure that the asm code finalization path is not triggered when
invoked via final(), since it already takes care of that itself.

Signed-off-by: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
</feed>
