<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/arch/arm64/boot, branch linux-6.3.y</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>arm64: dts: mt7986: increase bl2 partition on NAND of Bananapi R3</title>
<updated>2023-07-11T17:39:43+00:00</updated>
<author>
<name>Daniel Golle</name>
<email>daniel@makrotopia.org</email>
</author>
<published>2023-06-06T15:43:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=ce2f6ff1e526d53804369cef2465d80e3fac1818'/>
<id>ce2f6ff1e526d53804369cef2465d80e3fac1818</id>
<content type='text'>
[ Upstream commit 3bfbff9b461e3506dfb5b2904e8c15a0aea39e07 ]

The bootrom burned into the MT7986 SoC will try multiple locations on
the SPI-NAND flash to load bl2 in case the bl2 image located at the the
previously attempted offset is corrupt.

Use 0x100000 instead of 0x80000 as partition size for bl2 on SPI-NAND,
allowing for up to four redundant copies of bl2 (typically sized a
bit less than 0x40000).

Fixes: 8e01fb15b8157 ("arm64: dts: mt7986: add Bananapi R3")
Signed-off-by: Daniel Golle &lt;daniel@makrotopia.org&gt;
Link: https://lore.kernel.org/r/ZH9UGF99RgzrHZ88@makrotopia.org
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit 3bfbff9b461e3506dfb5b2904e8c15a0aea39e07 ]

The bootrom burned into the MT7986 SoC will try multiple locations on
the SPI-NAND flash to load bl2 in case the bl2 image located at the the
previously attempted offset is corrupt.

Use 0x100000 instead of 0x80000 as partition size for bl2 on SPI-NAND,
allowing for up to four redundant copies of bl2 (typically sized a
bit less than 0x40000).

Fixes: 8e01fb15b8157 ("arm64: dts: mt7986: add Bananapi R3")
Signed-off-by: Daniel Golle &lt;daniel@makrotopia.org&gt;
Link: https://lore.kernel.org/r/ZH9UGF99RgzrHZ88@makrotopia.org
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: mediatek: mt8192: Fix CPUs capacity-dmips-mhz</title>
<updated>2023-07-11T17:39:43+00:00</updated>
<author>
<name>Nícolas F. R. A. Prado</name>
<email>nfraprado@collabora.com</email>
</author>
<published>2023-06-02T18:35:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=dd6dd939eadde697c203e1406b93792dbed96d3d'/>
<id>dd6dd939eadde697c203e1406b93792dbed96d3d</id>
<content type='text'>
[ Upstream commit a4366b5695c984b8a3fc8b31de9e758c8f6d1aed ]

The capacity-dmips-mhz parameter was miscalculated: this SoC runs
the first (Cortex-A55) cluster at a maximum of 2000MHz and the
second (Cortex-A76) cluster at a maximum of 2200MHz.

In order to calculate the right capacity-dmips-mhz, the following
test was performed:
1. CPUFREQ governor was set to 'performance' on both clusters
2. Ran dhrystone with 500000000 iterations for 10 times on each cluster
3. Calculated the mean result for each cluster
4. Calculated DMIPS/MHz: dmips_mhz = dmips_per_second / cpu_mhz
5. Scaled results to 1024:
   result_c0 = dmips_mhz_c0 / dmips_mhz_c1 * 1024

The mean results for this SoC are:
Cluster 0 (LITTLE): 12016411 Dhry/s
Cluster 1 (BIG): 31702034 Dhry/s

The calculated scaled results are:
Cluster 0: 426.953226899238 (rounded to 427)
Cluster 1: 1024

Fixes: 48489980e27e ("arm64: dts: Add Mediatek SoC MT8192 and evaluation board dts and Makefile")
Signed-off-by: Nícolas F. R. A. Prado &lt;nfraprado@collabora.com&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Link: https://lore.kernel.org/r/20230602183515.3778780-1-nfraprado@collabora.com
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit a4366b5695c984b8a3fc8b31de9e758c8f6d1aed ]

The capacity-dmips-mhz parameter was miscalculated: this SoC runs
the first (Cortex-A55) cluster at a maximum of 2000MHz and the
second (Cortex-A76) cluster at a maximum of 2200MHz.

In order to calculate the right capacity-dmips-mhz, the following
test was performed:
1. CPUFREQ governor was set to 'performance' on both clusters
2. Ran dhrystone with 500000000 iterations for 10 times on each cluster
3. Calculated the mean result for each cluster
4. Calculated DMIPS/MHz: dmips_mhz = dmips_per_second / cpu_mhz
5. Scaled results to 1024:
   result_c0 = dmips_mhz_c0 / dmips_mhz_c1 * 1024

The mean results for this SoC are:
Cluster 0 (LITTLE): 12016411 Dhry/s
Cluster 1 (BIG): 31702034 Dhry/s

The calculated scaled results are:
Cluster 0: 426.953226899238 (rounded to 427)
Cluster 1: 1024

Fixes: 48489980e27e ("arm64: dts: Add Mediatek SoC MT8192 and evaluation board dts and Makefile")
Signed-off-by: Nícolas F. R. A. Prado &lt;nfraprado@collabora.com&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Link: https://lore.kernel.org/r/20230602183515.3778780-1-nfraprado@collabora.com
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: mediatek: Add cpufreq nodes for MT8192</title>
<updated>2023-07-11T17:39:43+00:00</updated>
<author>
<name>Allen-KH Cheng</name>
<email>allen-kh.cheng@mediatek.com</email>
</author>
<published>2023-03-17T06:19:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=1395d2b7759f09029d294615996552e75e5533a7'/>
<id>1395d2b7759f09029d294615996552e75e5533a7</id>
<content type='text'>
[ Upstream commit 9d498cce9298a71e3896e2d1aee24a1a4c531d81 ]

Add the cpufreq nodes for MT8192 SoC.

Signed-off-by: Allen-KH Cheng &lt;allen-kh.cheng@mediatek.com&gt;
Tested-by: Chen-Yu Tsai &lt;wenst@chromium.org&gt;
Reviewed-by: Nícolas F. R. A. Prado &lt;nfraprado@collabora.com&gt;
Tested-by: Nícolas F. R. A. Prado &lt;nfraprado@collabora.com&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Tested-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Link: https://lore.kernel.org/r/20230317061944.15434-1-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Stable-dep-of: a4366b5695c9 ("arm64: dts: mediatek: mt8192: Fix CPUs capacity-dmips-mhz")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit 9d498cce9298a71e3896e2d1aee24a1a4c531d81 ]

Add the cpufreq nodes for MT8192 SoC.

Signed-off-by: Allen-KH Cheng &lt;allen-kh.cheng@mediatek.com&gt;
Tested-by: Chen-Yu Tsai &lt;wenst@chromium.org&gt;
Reviewed-by: Nícolas F. R. A. Prado &lt;nfraprado@collabora.com&gt;
Tested-by: Nícolas F. R. A. Prado &lt;nfraprado@collabora.com&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Tested-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Link: https://lore.kernel.org/r/20230317061944.15434-1-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Stable-dep-of: a4366b5695c9 ("arm64: dts: mediatek: mt8192: Fix CPUs capacity-dmips-mhz")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: ti: k3-am69-sk: Fix main_i2c0 alias</title>
<updated>2023-07-11T17:39:42+00:00</updated>
<author>
<name>Nishanth Menon</name>
<email>nm@ti.com</email>
</author>
<published>2023-06-02T21:49:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=d3ca34e186b7f6357a6b28bcd5fc5107c7992515'/>
<id>d3ca34e186b7f6357a6b28bcd5fc5107c7992515</id>
<content type='text'>
[ Upstream commit b38c6ced4ec5b3f6260ff6cc2b71e8a3d8c897d7 ]

main_i2c0 is aliased as i2c0 which creates a problem for u-boot R5
SPL attempting to reuse the same definition in the common board
detection logic as it looks for the first i2c instance as the bus on
which to detect the eeprom to understand the board variant involved.
Switch main_i2c0 to i2c3 alias allowing us to introduce wkup_i2c0
and potentially space for mcu_i2c instances in the gap for follow on
patches.

Fixes: 635fb18ba008 ("arch: arm64: dts: Add support for AM69 Starter Kit")
Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
Reviewed-by: Udit Kumar &lt;u-kumar1@ti.com&gt;
Link: https://lore.kernel.org/r/20230602214937.2349545-5-nm@ti.com
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit b38c6ced4ec5b3f6260ff6cc2b71e8a3d8c897d7 ]

main_i2c0 is aliased as i2c0 which creates a problem for u-boot R5
SPL attempting to reuse the same definition in the common board
detection logic as it looks for the first i2c instance as the bus on
which to detect the eeprom to understand the board variant involved.
Switch main_i2c0 to i2c3 alias allowing us to introduce wkup_i2c0
and potentially space for mcu_i2c instances in the gap for follow on
patches.

Fixes: 635fb18ba008 ("arch: arm64: dts: Add support for AM69 Starter Kit")
Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
Reviewed-by: Udit Kumar &lt;u-kumar1@ti.com&gt;
Link: https://lore.kernel.org/r/20230602214937.2349545-5-nm@ti.com
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets</title>
<updated>2023-07-11T17:39:42+00:00</updated>
<author>
<name>Thejasvi Konduru</name>
<email>t-konduru@ti.com</email>
</author>
<published>2023-05-03T08:31:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=427eeceb1d2e05663a285e7ce1881c42c57c9779'/>
<id>427eeceb1d2e05663a285e7ce1881c42c57c9779</id>
<content type='text'>
[ Upstream commit 14462bd0b247d05070d48d0f02eb7ca2680ab7bd ]

The wkup_pmx register region in j784s4 has multiple non-addressable
regions, hence the existing wkup_pmx region is split as follows to
avoid the non-addressable regions. The pinctrl node offsets are
also corrected as per the newly split wkup_pmx* nodes.

wkup_pmx0 -&gt; 13 pins (WKUP_PADCONFIG 0 - 12)
wkup_pmx1 -&gt; 11 pins (WKUP_PADCONFIG 14 - 24)
wkup_pmx2 -&gt; 72 pins (WKUP_PADCONFIG 26 - 97)
wkup_pmx3 -&gt; 1 pin (WKUP_PADCONFIG 100)

Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC")
Signed-off-by: Thejasvi Konduru &lt;t-konduru@ti.com&gt;
Reviewed-by: Nishanth Menon &lt;nm@ti.com&gt;
Link: https://lore.kernel.org/r/20230503083143.32369-1-t-konduru@ti.com
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit 14462bd0b247d05070d48d0f02eb7ca2680ab7bd ]

The wkup_pmx register region in j784s4 has multiple non-addressable
regions, hence the existing wkup_pmx region is split as follows to
avoid the non-addressable regions. The pinctrl node offsets are
also corrected as per the newly split wkup_pmx* nodes.

wkup_pmx0 -&gt; 13 pins (WKUP_PADCONFIG 0 - 12)
wkup_pmx1 -&gt; 11 pins (WKUP_PADCONFIG 14 - 24)
wkup_pmx2 -&gt; 72 pins (WKUP_PADCONFIG 26 - 97)
wkup_pmx3 -&gt; 1 pin (WKUP_PADCONFIG 100)

Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC")
Signed-off-by: Thejasvi Konduru &lt;t-konduru@ti.com&gt;
Reviewed-by: Nishanth Menon &lt;nm@ti.com&gt;
Link: https://lore.kernel.org/r/20230503083143.32369-1-t-konduru@ti.com
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: ti: k3-j784s4-evm: Enable MCU CPSW2G</title>
<updated>2023-07-11T17:39:42+00:00</updated>
<author>
<name>Siddharth Vadapalli</name>
<email>s-vadapalli@ti.com</email>
</author>
<published>2023-03-15T04:25:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b13201da5f81bbe7d901b9822fadd58492f11541'/>
<id>b13201da5f81bbe7d901b9822fadd58492f11541</id>
<content type='text'>
[ Upstream commit 6cd4b7cfbcca4a45f06a8031f299c4019221a4ce ]

Add device tree support to enable MCU CPSW with J784S4 EVM.

Signed-off-by: Siddharth Vadapalli &lt;s-vadapalli@ti.com&gt;
Reviewed-by: Andrew Davis &lt;afd@ti.com&gt;
Link: https://lore.kernel.org/r/20230315042548.1500528-1-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
Stable-dep-of: 14462bd0b247 ("arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit 6cd4b7cfbcca4a45f06a8031f299c4019221a4ce ]

Add device tree support to enable MCU CPSW with J784S4 EVM.

Signed-off-by: Siddharth Vadapalli &lt;s-vadapalli@ti.com&gt;
Reviewed-by: Andrew Davis &lt;afd@ti.com&gt;
Link: https://lore.kernel.org/r/20230315042548.1500528-1-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
Stable-dep-of: 14462bd0b247 ("arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: ti: k3-j784s4-evm: Fix main_i2c0 alias</title>
<updated>2023-07-11T17:39:42+00:00</updated>
<author>
<name>Nishanth Menon</name>
<email>nm@ti.com</email>
</author>
<published>2023-06-02T21:49:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=c1aa3984d134e7001f7bd7dd3970c59f21e1af9f'/>
<id>c1aa3984d134e7001f7bd7dd3970c59f21e1af9f</id>
<content type='text'>
[ Upstream commit c10a9df30e3401bd5a5ee43f1afd6c2b2ca75ad7 ]

main_i2c0 is aliased as i2c0 which creates a problem for u-boot R5
SPL attempting to reuse the same definition in the common board
detection logic as it looks for the first i2c instance as the bus on
which to detect the eeprom to understand the board variant involved.
Switch main_i2c0 to i2c3 alias allowing us to introduce wkup_i2c0
and potentially space for mcu_i2c instances in the gap for follow on
patches.

Fixes: e20a06aca5c9 ("arm64: dts: ti: Add support for J784S4 EVM board")
Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
Reviewed-by: Udit Kumar &lt;u-kumar1@ti.com&gt;
Link: https://lore.kernel.org/r/20230602214937.2349545-2-nm@ti.com
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit c10a9df30e3401bd5a5ee43f1afd6c2b2ca75ad7 ]

main_i2c0 is aliased as i2c0 which creates a problem for u-boot R5
SPL attempting to reuse the same definition in the common board
detection logic as it looks for the first i2c instance as the bus on
which to detect the eeprom to understand the board variant involved.
Switch main_i2c0 to i2c3 alias allowing us to introduce wkup_i2c0
and potentially space for mcu_i2c instances in the gap for follow on
patches.

Fixes: e20a06aca5c9 ("arm64: dts: ti: Add support for J784S4 EVM board")
Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
Reviewed-by: Udit Kumar &lt;u-kumar1@ti.com&gt;
Link: https://lore.kernel.org/r/20230602214937.2349545-2-nm@ti.com
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: ti: k3-j721e-beagleboneai64: Fix mailbox node status</title>
<updated>2023-07-11T17:39:42+00:00</updated>
<author>
<name>Andrew Davis</name>
<email>afd@ti.com</email>
</author>
<published>2023-05-15T17:21:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=ce8ddab5157f38757ef757097c2ec4d3b54f3b73'/>
<id>ce8ddab5157f38757ef757097c2ec4d3b54f3b73</id>
<content type='text'>
[ Upstream commit 155e7635ed1f3814d94d12556a3a0fed41d05b76 ]

Mailbox nodes are now disabled by default. The BeagleBoard AI64 DT
addition went in at around the same time and must have missed that
change so the mailboxes are not re-enabled. Do that here.

Fixes: fae14a1cb8dd ("arm64: dts: ti: Add k3-j721e-beagleboneai64")
Signed-off-by: Andrew Davis &lt;afd@ti.com&gt;
Reviewed-by: Nishanth Menon &lt;nm@ti.com&gt;
Link: https://lore.kernel.org/r/20230515172137.474626-1-afd@ti.com
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit 155e7635ed1f3814d94d12556a3a0fed41d05b76 ]

Mailbox nodes are now disabled by default. The BeagleBoard AI64 DT
addition went in at around the same time and must have missed that
change so the mailboxes are not re-enabled. Do that here.

Fixes: fae14a1cb8dd ("arm64: dts: ti: Add k3-j721e-beagleboneai64")
Signed-off-by: Andrew Davis &lt;afd@ti.com&gt;
Reviewed-by: Nishanth Menon &lt;nm@ti.com&gt;
Link: https://lore.kernel.org/r/20230515172137.474626-1-afd@ti.com
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: qcom: sm8550: Add missing interconnect path to USB HC</title>
<updated>2023-07-11T17:39:42+00:00</updated>
<author>
<name>Abel Vesa</name>
<email>abel.vesa@linaro.org</email>
</author>
<published>2023-06-01T10:38:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=3eb86a15fd674af15f2da470bdfbb271300c792a'/>
<id>3eb86a15fd674af15f2da470bdfbb271300c792a</id>
<content type='text'>
[ Upstream commit 11a1397bbf69e408223bb691858a0fcd295a8f76 ]

The USB HC node is missing the interconnect paths, so add them.

Fixes: 7f7e5c1b037f ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes")
Signed-off-by: Abel Vesa &lt;abel.vesa@linaro.org&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Link: https://lore.kernel.org/r/20230601103817.4066446-1-abel.vesa@linaro.org
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit 11a1397bbf69e408223bb691858a0fcd295a8f76 ]

The USB HC node is missing the interconnect paths, so add them.

Fixes: 7f7e5c1b037f ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes")
Signed-off-by: Abel Vesa &lt;abel.vesa@linaro.org&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Link: https://lore.kernel.org/r/20230601103817.4066446-1-abel.vesa@linaro.org
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
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</entry>
<entry>
<title>arm64: dts: qcom: sm8250-edo: Panel framebuffer is 2.5k instead of 4k</title>
<updated>2023-07-11T17:39:42+00:00</updated>
<author>
<name>Marijn Suijten</name>
<email>marijn.suijten@somainline.org</email>
</author>
<published>2023-06-06T21:14:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=a99268cee28c6e588024eb9e36edc2443f6aa0cd'/>
<id>a99268cee28c6e588024eb9e36edc2443f6aa0cd</id>
<content type='text'>
[ Upstream commit 223ce29c8b7e5b00f01a68387aabeefd77d97f06 ]

The framebuffer configuration for edo pdx203, written in edo dtsi (which
is overwritten in pdx206 dts for its smaller panel) has to use a
1096x2560 configuration as this is what the panel (and framebuffer area)
has been initialized to.  Downstream userspace also has access to (and
uses) this 2.5k mode by default, and only switches the panel to 4k when
requested.

This is similar to commit be8de06dc397 ("arm64: dts: qcom:
sm8150-kumano: Panel framebuffer is 2.5k instead of 4k") which fixed the
same for the previous generation Sony platform.

Fixes: 69cdb97ef652 ("arm64: dts: qcom: sm8250: Add support for SONY Xperia 1 II / 5 II (Edo platform)")
Signed-off-by: Marijn Suijten &lt;marijn.suijten@somainline.org&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Link: https://lore.kernel.org/r/20230606211418.587676-1-marijn.suijten@somainline.org
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit 223ce29c8b7e5b00f01a68387aabeefd77d97f06 ]

The framebuffer configuration for edo pdx203, written in edo dtsi (which
is overwritten in pdx206 dts for its smaller panel) has to use a
1096x2560 configuration as this is what the panel (and framebuffer area)
has been initialized to.  Downstream userspace also has access to (and
uses) this 2.5k mode by default, and only switches the panel to 4k when
requested.

This is similar to commit be8de06dc397 ("arm64: dts: qcom:
sm8150-kumano: Panel framebuffer is 2.5k instead of 4k") which fixed the
same for the previous generation Sony platform.

Fixes: 69cdb97ef652 ("arm64: dts: qcom: sm8250: Add support for SONY Xperia 1 II / 5 II (Edo platform)")
Signed-off-by: Marijn Suijten &lt;marijn.suijten@somainline.org&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Link: https://lore.kernel.org/r/20230606211418.587676-1-marijn.suijten@somainline.org
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
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