linux-stable.git/arch/arm/kernel, branch v3.14.8

ARM: 8064/1: fix v7-M signal return

2014-06-11T18:54:09+00:00

commit 483a6c9d447f625b991fa04a1530493d893984db upstream.

According to the ARM ARM, the behaviour is UNPREDICTABLE if the PC read
from the exception return stack is not half word aligned.  See the
pseudo code for ExceptionReturn() and PopStack().

The signal handler's address has the bit 0 set, and setup_return()
directly writes this to regs->ARM_pc.  Current hardware happens to
discard this bit, but QEMU's emulation doesn't and this makes processes
crash.  Mask out bit 0 before the exception return in order to get
predictable behaviour.

Fixes: 19c4d593f0b4 ("ARM: ARMv7-M: Add support for exception handling")

Acked-by: Uwe Kleine-König 
Signed-off-by: Rabin Vincent 
Signed-off-by: Russell King 
Signed-off-by: Greg Kroah-Hartman

ARM: 8012/1: kdump: Avoid overflow when converting pfn to physaddr

2014-06-07T17:28:17+00:00

commit 8fad87bca7ac9737e413ba5f1656f1114a8c314d upstream.

When we configure CONFIG_ARM_LPAE=y, pfn << PAGE_SHIFT will
overflow if pfn >= 0x100000 in copy_oldmem_page.
So use __pfn_to_phys for converting.

Signed-off-by: Liu Hua 
Signed-off-by: Russell King 
Signed-off-by: Greg Kroah-Hartman

ARM: 8030/1: ARM : kdump : add arch_crash_save_vmcoreinfo

2014-05-06T14:59:22+00:00

commit 56b700fd6f1e49149880fb1b6ffee0dca5be45fb upstream.

For vmcore generated by LPAE enabled kernel, user space
utility such as crash needs additional infomation to
parse.

So this patch add arch_crash_save_vmcoreinfo as what PAE enabled
i386 linux does.

Reviewed-by: Will Deacon 
Signed-off-by: Liu Hua 
Signed-off-by: Russell King 
Signed-off-by: Greg Kroah-Hartman

ARM: 7980/1: kernel: improve error message when LPAE config doesn't match CPU

2014-02-21T11:56:32+00:00

Currently, when the kernel is configured with LPAE support, but the
CPU doesn't support it, the error message is fairly cryptic:

  Error: unrecognized/unsupported processor variant (0x561f5811).

This messages is normally shown when there is an issue when comparing
the processor ID (CP15 0, c0, c0) with the values/masks described in
proc-v7.S. However, the same message is displayed when LPAE support is
enabled in the kernel configuration, but not available in the CPU,
after looking at ID_MMFR0 (CP15 0, c0, c1, 4). Having the same error
message is highly misleading.

This commit improves this by showing a different error message when
this situation occurs:

  Error: Kernel with LPAE support, but CPU does not support LPAE.

Signed-off-by: Thomas Petazzoni 
Signed-off-by: Russell King

ARM: 7952/1: mm: Fix the memblock allocation for LPAE machines

2014-02-10T11:44:12+00:00

Commit ad6492b8 added much needed memblock_virt_alloc_low() and further
commit 07bacb3 {memblock, bootmem: restore goal for alloc_low} fixed
the issue with low memory limit thanks to Yinghai. But even after all
these fixes, there is still one case where the limit check done with
ARCH_LOW_ADDRESS_LIMIT for low memory fails. Russell pointed out the
issue with 32 bit LPAE machines in below thread.
	https://lkml.org/lkml/2014/1/28/364

Since on some LPAE machines where memory start address is beyond 4GB,
the low memory marker in memblock will be set to default
ARCH_LOW_ADDRESS_LIMIT which is wrong. We can fix this by letting
architectures set the ARCH_LOW_ADDRESS_LIMIT using another export
similar to memblock_set_current_limit() but am not sure whether
its worth the trouble. Tell me if you think otherwise.

Rather am just trying to fix that one broken case using
memblock_virt_alloc() in setup code since the memblock.current_limit
is updated appropriately makes it work on all ARM 32 bit machines.

Cc: Yinghai Lu 
Cc: Strashko, Grygorii 
Cc: Andrew Morton 
Signed-off-by: Santosh Shilimkar 
Signed-off-by: Russell King

Merge branches 'fixes' and 'misc' into for-linus

2014-01-28T21:38:48+00:00

ARM: 7947/1: Make pgtbl macro more robust

2014-01-28T14:34:03+00:00

The pgtbl macro couldn't handle the specific
(TEXT_OFFSET - PG_DIR_SIZE) value that the combination of
MSM platforms and LPAE created:

head.S:163: Error: invalid constant (203000) after fixup

Regardless of whether this combination of configuration options
will work on currently support platforms at run time, make it
at least assemble properly.

Signed-off-by: Christopher Covington 
Reviewed-by: Stephen Boyd 
Signed-off-by: Russell King

ARM: 7946/1: asm: __und_usr_thumb need byteswap instructions in BE case

2014-01-28T14:34:02+00:00

__und_usr_thumb function deals with thumb2 opcodes. In case of BE
image, it needs to byteswap half word thumb2 encoded instructions
before further processing them.

Without this fix BE image user-land thread executing first VFP
instruction encoded in thumb2 fails with SIGILL, because kernel
does not recognize instruction and does not enable VFP.

Reported-by: Corey Melton 
Signed-off-by: Victor Kamensky 
Tested-by: Stephen Boyd 
Signed-off-by: Russell King

ARM: 7930/1: Introduce atomic MMIO modify

2014-01-28T14:06:25+00:00

Some SoC have MMIO regions that are shared across orthogonal
subsystems. This commit implements a possible solution for the
thread-safe access of such regions through a spinlock-protected API.

Concurrent access is protected with a single spinlock for the
entire MMIO address space. While this protects shared-registers,
it also serializes access to unrelated/unshared registers.

We add relaxed and non-relaxed variants, by using writel_relaxed and writel,
respectively. The rationale for this is that some users may not require
register write completion but only thread-safe access to a register.

Tested-by: Sebastian Hesselbarth 
Acked-by: Jason Cooper 
Acked-by: Catalin Marinas 
Signed-off-by: Ezequiel Garcia 
Signed-off-by: Russell King

memblock, nobootmem: add memblock_virt_alloc_low()

2014-01-28T05:02:38+00:00

The new memblock_virt APIs are used to replaced old bootmem API.

We need to allocate page below 4G for swiotlb.

That should fix regression on Andrew's system that is using swiotlb.

Signed-off-by: Yinghai Lu 
Cc: Russell King 
Cc: Konrad Rzeszutek Wilk 
Acked-by: Santosh Shilimkar 
Cc: Dave Hansen 
Cc: Ingo Molnar 
Cc: "H. Peter Anvin" 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds