linux-stable.git/arch/arm/kernel/head.S, branch v3.7 Linux kernel stable tree Merge branch 'fixes' into for-linus 2012-10-11T09:55:04+00:00 Russell King rmk+kernel@arm.linux.org.uk 2012-10-11T09:55:04+00:00 a0f0dd57f4a85310d9936f1770a0424b49fef876 Conflicts: arch/arm/kernel/smp.c 
Conflicts:
	arch/arm/kernel/smp.c
ARM: virt: allow the kernel to be entered in HYP mode 2012-09-19T07:32:50+00:00 Dave Martin dave.martin@linaro.org 2012-02-09T16:47:17+00:00 80c59dafb1a9a86fa996e6e34d06b60567c925ca This patch does two things: * Ensure that asynchronous aborts are masked at kernel entry. The bootloader should be masking these anyway, but this reduces the damage window just in case it doesn't. * Enter svc mode via exception return to ensure that CPU state is properly serialised. This does not matter when switching from an ordinary privileged mode ("PL1" modes in ARMv7-AR rev C parlance), but it potentially does matter when switching from a another privileged mode such as hyp mode. This should allow the kernel to boot safely either from svc mode or hyp mode, even if no support for use of the ARM Virtualization Extensions is built into the kernel. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> 
This patch does two things:

  * Ensure that asynchronous aborts are masked at kernel entry.
    The bootloader should be masking these anyway, but this reduces
    the damage window just in case it doesn't.

  * Enter svc mode via exception return to ensure that CPU state is
    properly serialised.  This does not matter when switching from
    an ordinary privileged mode ("PL1" modes in ARMv7-AR rev C
    parlance), but it potentially does matter when switching from a
    another privileged mode such as hyp mode.

This should allow the kernel to boot safely either from svc mode or
hyp mode, even if no support for use of the ARM Virtualization
Extensions is built into the kernel.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
ARM: move debug macros to common location 2012-09-14T14:22:00+00:00 Rob Herring rob.herring@calxeda.com 2012-08-31T05:03:46+00:00 91a9fec022f5d98835e27d5307d487da3798040c Based on suggestion by Russell King, create a common location for debug macros and select the included debug macro file using config option. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> 
Based on suggestion by Russell King, create a common location for debug
macros and select the included debug macro file using config option.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
ARM: 7439/1: head.S: simplify initial page table mapping 2012-07-09T16:39:39+00:00 Nicolas Pitre nicolas.pitre@linaro.org 2012-07-04T03:58:12+00:00 9fa16b7755967b1b4dc704de71a3d639d13e21fc Let's map the initial RAM up to the end of the kernel .bss instead of the strict kernel image area. This simplifies the code as the kernel image only needs to be handled specially in the XIP case. That covers the legacy ATAG location as well. Signed-off-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
Let's map the initial RAM up to the end of the kernel .bss instead of
the strict kernel image area.  This simplifies the code as the kernel
image only needs to be handled specially in the XIP case.  That covers
the legacy ATAG location as well.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: 7363/1: DEBUG_LL: limit early mapping to the minimum 2012-05-04T15:56:46+00:00 Nicolas Pitre nicolas.pitre@linaro.org 2012-03-18T19:29:42+00:00 f67860a76f162ebcc6a2cacf3b0538d8a67d55ae There is just no point mapping up to 512MB for a serial port. Using a single 1MB entry is way sufficient for all users. This will create less interference for the following debugging patch. Signed-off-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
There is just no point mapping up to 512MB for a serial port.
Using a single 1MB entry is way sufficient for all users.
This will create less interference for the following debugging patch.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: 7338/1: add support for early console output via semihosting 2012-03-24T09:38:55+00:00 Nicolas Pitre nicolas.pitre@linaro.org 2012-02-22T20:58:03+00:00 9b5a146a43db3733c731d47022f4f5259e6b31e6 This is a very simple method for code running in an emulator, or under the supervision of a debugger, to use I/O facilities on the controlling host. Tested with OpenOCD, and ARM's Fast Models. Details on semihosting can be found in chapter 8 of DUI0203I_rvct_developer_guide.pdf from ARM Ltd. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
This is a very simple method for code running in an emulator, or under
the supervision of a debugger, to use I/O facilities on the controlling
host.

Tested with OpenOCD, and ARM's Fast Models.

Details on semihosting can be found in chapter 8 of
DUI0203I_rvct_developer_guide.pdf from ARM Ltd.

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: move CP15 definitions to separate header file 2012-03-24T09:38:51+00:00 Russell King rmk+kernel@arm.linux.org.uk 2012-01-19T10:05:41+00:00 195864cf3d6f5b6b743793bda3aaa2ff65d322ae Avoid namespace conflicts with drivers over the CP15 definitions by moving CP15 related prototypes and definitions to a private header file. Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> [Tegra] Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Tested-by: H Hartley Sweeten <hsweeten@visionengravers.com> [EP93xx] Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
Avoid namespace conflicts with drivers over the CP15 definitions by
moving CP15 related prototypes and definitions to a private header
file.

Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com> [Tegra]
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Tested-by: H Hartley Sweeten <hsweeten@visionengravers.com> [EP93xx]
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: 7275/1: LPAE: Check the CPU support for the long descriptor format 2012-01-13T08:56:41+00:00 Catalin Marinas catalin.marinas@arm.com 2012-01-09T11:24:47+00:00 294064f58953f9964e5945424b09c51800330a83 This patch adds a check for the presence of the LPAE feature during the CPU initialisation. If not present, it reports an error when CONFIG_DEBUG_LL is enabled. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
This patch adds a check for the presence of the LPAE feature during the
CPU initialisation. If not present, it reports an error when
CONFIG_DEBUG_LL is enabled.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Merge branch 'for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux into devel-stable 2011-12-08T18:02:04+00:00 Russell King rmk+kernel@arm.linux.org.uk 2011-12-08T18:02:04+00:00 6ae25a5b9d7ba86d6ac19c403dfa57dae6caa73d Conflicts: arch/arm/mm/ioremap.c 
Conflicts:
	arch/arm/mm/ioremap.c
ARM: LPAE: MMU setup for the 3-level page table format 2011-12-08T10:30:39+00:00 Catalin Marinas catalin.marinas@arm.com 2011-11-22T17:30:29+00:00 1b6ba46b7efa31055eb993a6f2c6bbcb8b35b001 This patch adds the MMU initialisation for the LPAE page table format. The swapper_pg_dir size with LPAE is 5 rather than 4 pages. A new proc-v7-3level.S file contains the TTB initialisation, context switch and PTE setting code with the LPAE. The TTBRx split is based on the PAGE_OFFSET with TTBR1 used for the kernel mappings. The 36-bit mappings (supersections) and a few other memory types in mmu.c are conditionally compiled. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> 
This patch adds the MMU initialisation for the LPAE page table format.
The swapper_pg_dir size with LPAE is 5 rather than 4 pages. A new
proc-v7-3level.S file contains the TTB initialisation, context switch
and PTE setting code with the LPAE. The TTBRx split is based on the
PAGE_OFFSET with TTBR1 used for the kernel mappings. The 36-bit mappings
(supersections) and a few other memory types in mmu.c are conditionally
compiled.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>