linux-stable.git/arch/arm/boot, branch linux-3.12.y

ARM: dts: da850-evm: fix read access to SPI flash

2017-01-27T10:15:55+00:00

commit 43849785e1079f6606a31cb7fda92d1200849728 upstream.

Read access to the SPI flash are broken on da850-evm, i.e. the data
read is not what is actually programmed on the flash.
According to the datasheet for the M25P64 part present on the da850-evm,
if the SPI frequency is higher than 20MHz then the READ command is not
usable anymore and only the FAST_READ command can be used to read data.

This commit specifies in the DTS that we should use FAST_READ command
instead of the READ command.

Tested-by: Kevin Hilman 
Signed-off-by: Fabien Parent 
[nsekhar@ti.com: subject line adjustment]
Signed-off-by: Sekhar Nori 
Signed-off-by: Jiri Slaby 

Signed-off-by: Olof Johansson

ARM: dts: imx31: fix AVIC base address

2017-01-26T16:41:00+00:00

commit af92305e567b7f4c9cf48b9e46c1f48ec9ffb1fb upstream.

On i.MX31 AVIC interrupt controller base address is at 0x68000000.

The problem was shadowed by the AVIC driver, which takes the correct
base address from a SoC specific header file.

Fixes: d2a37b3d91f4 ("ARM i.MX31: Add devicetree support")
Signed-off-by: Vladimir Zapolskiy 
Reviewed-by: Fabio Estevam 
Signed-off-by: Shawn Guo 
Signed-off-by: Jiri Slaby

ARM: dts: imx31: move CCM device node to AIPS2 bus devices

2017-01-26T16:40:59+00:00

commit 1f87aee6a2e55eda466a43ba6248a8b75eede153 upstream.

i.MX31 Clock Control Module controller is found on AIPS2 bus, move it
there from SPBA bus to avoid a conflict of device IO space mismatch.

Fixes: ef0e4a606fb6 ("ARM: mx31: Replace clk_register_clkdev with clock DT lookup")
Signed-off-by: Vladimir Zapolskiy 
Acked-by: Uwe Kleine-König 
Signed-off-by: Shawn Guo 
Signed-off-by: Jiri Slaby

ARM: dts: imx31: fix clock control module interrupts description

2017-01-26T16:40:59+00:00

commit 2e575cbc930901718cc18e084566ecbb9a4b5ebb upstream.

The type of AVIC interrupt controller found on i.MX31 is one-cell,
namely 31 for CCM DVFS and 53 for CCM, however for clock control
module its interrupts are specified as 3-cells, fix it.

Fixes: ef0e4a606fb6 ("ARM: mx31: Replace clk_register_clkdev with clock DT lookup")
Acked-by: Rob Herring 
Signed-off-by: Vladimir Zapolskiy 
Signed-off-by: Shawn Guo 
Signed-off-by: Jiri Slaby

ARM: 8618/1: decompressor: reset ttbcr fields to use TTBR0 on ARMv7

2016-10-07T08:06:48+00:00

commit 117e5e9c4cfcb7628f08de074fbfefec1bb678b7 upstream.

If the bootloader uses the long descriptor format and jumps to
kernel decompressor code, TTBCR may not be in a right state.
Before enabling the MMU, it is required to clear the TTBCR.PD0
field to use TTBR0 for translation table walks.

The commit dbece45894d3a ("ARM: 7501/1: decompressor:
reset ttbcr for VMSA ARMv7 cores") does the reset of TTBCR.N, but
doesn't consider all the bits for the size of TTBCR.N.

Clear TTBCR.PD0 field and reset all the three bits of TTBCR.N to
indicate the use of TTBR0 and the correct base address width.

Fixes: dbece45894d3 ("ARM: 7501/1: decompressor: reset ttbcr for VMSA ARMv7 cores")
Acked-by: Robin Murphy 
Signed-off-by: Srinivas Ramana 
Signed-off-by: Russell King 
Signed-off-by: Jiri Slaby

dts: vt8500: Add SDHC node to DTS file for WM8650

2016-03-03T11:45:55+00:00

commit 0f090bf14e51e7eefb71d9d1c545807f8b627986 upstream.

Since WM8650 has the same 'WMT' SDHC controller as WM8505, and the driver
is already in the kernel, this node enables the controller support for
WM8650

Signed-off-by: Roman Volkov 
Reviewed-by: Alexey Charkov 
Signed-off-by: Arnd Bergmann 
Signed-off-by: Jiri Slaby

ARM: dts: Kirkwood: Fix QNAP TS219 power-off

2016-02-24T09:29:53+00:00

commit 5442f0eadf2885453d5b2ed8c8592f32a3744f8e upstream.

The "reg" entry in the "poweroff" section of "kirkwood-ts219.dtsi"
addressed the wrong uart (0 = console). This patch changes the address
to select uart 1, which is the uart connected to the pic
microcontroller, which can switch the device off.

Signed-off-by: Helmut Klein 
Signed-off-by: Andrew Lunn 
Fixes: 4350a47bbac3 ("ARM: Kirkwood: Make use of the QNAP Power off driver.")
Signed-off-by: Gregory CLEMENT 
Signed-off-by: Jiri Slaby

ARM: dts: omap5-uevm.dts: fix i2c5 pinctrl offsets

2015-10-27T09:18:24+00:00

commit 1dbdad75074d16c3e3005180f81a01cdc04a7872 upstream.

The i2c5 pinctrl offsets are wrong. If the bootloader doesn't set the
pins up, communication with tca6424a doesn't work (controller timeouts)
and it is not possible to enable HDMI.

Fixes: 9be495c42609 ("ARM: dts: omap5-evm: Add I2c pinctrl data")
Signed-off-by: Grazvydas Ignotas 
Signed-off-by: Tony Lindgren 
Signed-off-by: Jiri Slaby

ARM: dts: imx27: only map 4 Kbyte for fec registers

2015-06-03T09:33:13+00:00

commit a29ef819f3f34f89a1b9b6a939b4c1cdfe1e85ce upstream.

According to the imx27 documentation, fec has a 4 Kbyte
memory space map. Moreover, the actual 16 Kbyte mapping
overlaps the SCC (Security Controller) memory register
space. So, we reduce the memory register space to 4 Kbyte.

Signed-off-by: Philippe Reynes 
Acked-by: Uwe Kleine-König 
Fixes: 9f0749e3eb88 ("ARM i.MX27: Add devicetree support")
Signed-off-by: Shawn Guo 
Signed-off-by: Jiri Slaby

ARM: ux500: Enable GPIO regulator for SD-card for snowball

2015-05-16T07:12:45+00:00

commit 11133db7a836b0cb411faa048f07a38e994d1382 upstream.

Fixes: c94a4ab7af3f ("ARM: ux500: Disable the MMCI gpio-regulator by default")
Signed-off-by: Ulf Hansson 
Reviewed-by: Bjorn Andersson 
Signed-off-by: Linus Walleij 
Signed-off-by: Jiri Slaby