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<title>linux-stable.git/arch/arc/kernel/unaligned.c, branch v3.16.67</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>ARC: [arcompact] brown paper bag bug in unaligned access delay slot fixup</title>
<updated>2017-03-16T02:27:10+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>Vineet.Gupta1@synopsys.com</email>
</author>
<published>2017-02-07T17:44:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=2e441d9dc99f0ad0d839c4933bfd46c7938e31ea'/>
<id>2e441d9dc99f0ad0d839c4933bfd46c7938e31ea</id>
<content type='text'>
commit a524c218bc94c705886a0e0fedeee45d1931da32 upstream.

Reported-by: Jo-Philipp Wich &lt;jo@mein.io&gt;
Fixes: 9aed02feae57bf7 ("ARC: [arcompact] handle unaligned access delay slot")
Cc: linux-kernel@vger.kernel.org
Cc: linux-snps-arc@lists.infradead.org
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
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<pre>
commit a524c218bc94c705886a0e0fedeee45d1931da32 upstream.

Reported-by: Jo-Philipp Wich &lt;jo@mein.io&gt;
Fixes: 9aed02feae57bf7 ("ARC: [arcompact] handle unaligned access delay slot")
Cc: linux-kernel@vger.kernel.org
Cc: linux-snps-arc@lists.infradead.org
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</pre>
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</content>
</entry>
<entry>
<title>ARC: [arcompact] handle unaligned access delay slot corner case</title>
<updated>2017-03-16T02:27:07+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2017-01-27T18:45:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e15d8e5a5e167ffed0056c753c81eac17e3ea709'/>
<id>e15d8e5a5e167ffed0056c753c81eac17e3ea709</id>
<content type='text'>
commit 9aed02feae57bf7a40cb04ea0e3017cb7a998db4 upstream.

After emulating an unaligned access in delay slot of a branch, we
pretend as the delay slot never happened - so return back to actual
branch target (or next PC if branch was not taken).

Curently we did this by handling STATUS32.DE, we also need to clear the
BTA.T bit, which is disregarded when returning from original misaligned
exception, but could cause weirdness if it took the interrupt return
path (in case interrupt was acive too)

One ARC700 customer ran into this when enabling unaligned access fixup
for kernel mode accesses as well

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
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<pre>
commit 9aed02feae57bf7a40cb04ea0e3017cb7a998db4 upstream.

After emulating an unaligned access in delay slot of a branch, we
pretend as the delay slot never happened - so return back to actual
branch target (or next PC if branch was not taken).

Curently we did this by handling STATUS32.DE, we also need to clear the
BTA.T bit, which is disregarded when returning from original misaligned
exception, but could cause weirdness if it took the interrupt return
path (in case interrupt was acive too)

One ARC700 customer ran into this when enabling unaligned access fixup
for kernel mode accesses as well

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</pre>
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</content>
</entry>
<entry>
<title>ARC: Handle zero-overhead-loop in unaligned access handler</title>
<updated>2013-09-27T10:58:23+00:00</updated>
<author>
<name>Mischa Jonker</name>
<email>mjonker@synopsys.com</email>
</author>
<published>2013-09-26T13:44:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=c11eb222fd7d4db91196121dbf854178505d2751'/>
<id>c11eb222fd7d4db91196121dbf854178505d2751</id>
<content type='text'>
If a load or store is the last instruction in a zero-overhead-loop, and
it's misaligned, the loop would execute only once.

This fixes that problem.

Signed-off-by: Mischa Jonker &lt;mjonker@synopsys.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
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<pre>
If a load or store is the last instruction in a zero-overhead-loop, and
it's misaligned, the loop would execute only once.

This fixes that problem.

Signed-off-by: Mischa Jonker &lt;mjonker@synopsys.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARC: Handle un-aligned user space access in BE.</title>
<updated>2013-09-05T05:01:11+00:00</updated>
<author>
<name>Noam Camus</name>
<email>noamc@ezchip.com</email>
</author>
<published>2012-09-10T12:13:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=7d669a193bc0f44c20054687a3bf9ff82ad001a7'/>
<id>7d669a193bc0f44c20054687a3bf9ff82ad001a7</id>
<content type='text'>
Adding endian awarness to un-aligned access exception handling.

Signed-off-by: Noam Camus &lt;noamc@ezchip.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
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<pre>
Adding endian awarness to un-aligned access exception handling.

Signed-off-by: Noam Camus &lt;noamc@ezchip.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARC: Remove explicit passing around of ECR</title>
<updated>2013-06-26T10:00:50+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-06-12T09:43:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=38a9ff6d247cf9afcbe55ea245b650b8955029fd'/>
<id>38a9ff6d247cf9afcbe55ea245b650b8955029fd</id>
<content type='text'>
With ECR now part of pt_regs

* No need to propagate from lowest asm handlers as arg
* No need to save it in tsk-&gt;thread.cause_code
* Avoid bit chopping to access the bit-fields

More code consolidation, cleanup

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
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<pre>
With ECR now part of pt_regs

* No need to propagate from lowest asm handlers as arg
* No need to save it in tsk-&gt;thread.cause_code
* Avoid bit chopping to access the bit-fields

More code consolidation, cleanup

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARC: Unaligned access emulation</title>
<updated>2013-02-15T17:46:06+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-01-23T11:00:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=2e651ea1596b0ee25af4fcdc4cd13cbb33ffc254'/>
<id>2e651ea1596b0ee25af4fcdc4cd13cbb33ffc254</id>
<content type='text'>
ARC700 doesn't natively support unaligned access, but can be emulated
-Unaligned Access Exception
-Disassembly at the Fault address to find the exact insn (long/short)

Also per Arnd's comment, we runtime control it using 2 sysctl knobs:
* SYSCTL_ARCH_UNALIGN_ALLOW: Runtime enable/disble
* SYSCTL_ARCH_UNALIGN_NO_WARN: Warn on each emulation attempt

Originally contributed by Tim Yao &lt;tim.yao@amlogic.com&gt;

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Tim Yao &lt;tim.yao@amlogic.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
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<pre>
ARC700 doesn't natively support unaligned access, but can be emulated
-Unaligned Access Exception
-Disassembly at the Fault address to find the exact insn (long/short)

Also per Arnd's comment, we runtime control it using 2 sysctl knobs:
* SYSCTL_ARCH_UNALIGN_ALLOW: Runtime enable/disble
* SYSCTL_ARCH_UNALIGN_NO_WARN: Warn on each emulation attempt

Originally contributed by Tim Yao &lt;tim.yao@amlogic.com&gt;

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Tim Yao &lt;tim.yao@amlogic.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
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</entry>
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