linux-stable.git/Documentation/devicetree, branch v4.14.166

dt-bindings: clock: renesas: rcar-usb2-clock-sel: Fix typo in example

2020-01-09T09:17:58+00:00

commit 830dbce7c76ea529decac7d23b808c1e7da3d891 upstream.

The documented compatible value for R-Car H3 is
"renesas,r8a7795-rcar-usb2-clock-sel", not
"renesas,r8a77950-rcar-usb2-clock-sel".

Fixes: 311accb64570db45 ("clk: renesas: rcar-usb2-clock-sel: Add R-Car USB 2.0 clock selector PHY")
Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Yoshihiro Shimoda 
Acked-by: Rob Herring 
Link: https://lore.kernel.org/r/20191016145650.30003-1-geert+renesas@glider.be
Signed-off-by: Greg Kroah-Hartman

rtc: dt-binding: abx80x: fix resistance scale

2019-12-17T19:38:04+00:00

[ Upstream commit 73852e56827f5cb5db9d6e8dd8191fc2f2e8f424 ]

The abracon,tc-resistor property value is in kOhm.

Signed-off-by: Baruch Siach 
Signed-off-by: Alexandre Belloni 
Signed-off-by: Sasha Levin

net: phy: mdio-bcm-unimac: Allow configuring MDIO clock divider

2019-11-20T17:00:25+00:00

[ Upstream commit b78ac6ecd1b6b46f8767cbafa95a7b0b51b87ad8 ]

Allow the configuration of the MDIO clock divider when the Device Tree
contains 'clock-frequency' property (similar to I2C and SPI buses).
Because the hardware may have lost its state during suspend/resume,
re-apply the MDIO clock divider upon resumption.

Signed-off-by: Florian Fainelli 
Signed-off-by: David S. Miller 
Signed-off-by: Sasha Levin

media: dt-bindings: adv748x: Fix decimal unit addresses

2019-11-20T16:59:57+00:00

[ Upstream commit 27582f0ea97fe3e4a38beb98ab36cce4b6f029d5 ]

With recent dtc and W=1:

    Warning (graph_port): video-receiver@70/port@10: graph node unit address error, expected "a"
    Warning (graph_port): video-receiver@70/port@11: graph node unit address error, expected "b"

Unit addresses are always hexadecimal (without prefix), while the bases
of reg property values depend on their prefixes.

Fixes: e69595170b1cad85 ("media: adv748x: Add adv7481, adv7482 bindings")

Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Rob Herring 
Reviewed-by: Kieran Bingham 
Signed-off-by: Mauro Carvalho Chehab 
Signed-off-by: Sasha Levin

usb: dwc3: Allow disabling of metastability workaround

2019-11-12T18:18:18+00:00

commit 42bf02ec6e420e541af9a47437d0bdf961ca2972 upstream

Some platforms (e.g. TI's DRA7 USB2 instance) have more trouble
with the metastability workaround as it supports only
a High-Speed PHY and the PHY can enter into an Erratic state [1]
when the controller is set in SuperSpeed mode as part of
the metastability workaround.

This causes upto 2 seconds delay in enumeration on DRA7's USB2
instance in gadget mode.

If these platforms can be better off without the workaround,
provide a device tree property to suggest that so the workaround
is avoided.

[1] Device mode enumeration trace showing PHY Erratic Error.
     irq/90-dwc3-969   [000] d...    52.323145: dwc3_event: event (00000901): Erratic Error [U0]
     irq/90-dwc3-969   [000] d...    52.560646: dwc3_event: event (00000901): Erratic Error [U0]
     irq/90-dwc3-969   [000] d...    52.798144: dwc3_event: event (00000901): Erratic Error [U0]

Signed-off-by: Roger Quadros 
Signed-off-by: Felipe Balbi 
Signed-off-by: Mathieu Poirier 
Signed-off-by: Greg Kroah-Hartman

arm64: dts: marvell: Fix A37xx UART0 register size

2019-08-04T07:32:00+00:00

commit c737abc193d16e62e23e2fb585b8b7398ab380d8 upstream.

Armada-37xx UART0 registers are 0x200 bytes wide. Right next to them are
the UART1 registers that should not be declared in this node.

Update the example in DT bindings document accordingly.

Signed-off-by: allen yan 
Signed-off-by: Miquel Raynal 
Signed-off-by: Gregory CLEMENT 
Signed-off-by: Amit Pundir 
Signed-off-by: Greg Kroah-Hartman

dt-bindings: allow up to four clocks for orion-mdio

2019-07-31T05:28:43+00:00

commit 80785f5a22e9073e2ded5958feb7f220e066d17b upstream.

Armada 8040 needs four clocks to be enabled for MDIO accesses to work.
Update the binding to allow the extra clock to be specified.

Cc: stable@vger.kernel.org
Fixes: 6d6a331f44a1 ("dt-bindings: allow up to three clocks for orion-mdio")
Reviewed-by: Andrew Lunn 
Signed-off-by: Josua Mayer 
Signed-off-by: David S. Miller 
Signed-off-by: Greg Kroah-Hartman

dt-bindings: can: mcp251x: add mcp25625 support

2019-07-21T07:04:21+00:00

[ Upstream commit 0df82dcd55832a99363ab7f9fab954fcacdac3ae ]

Fully compatible with mcp2515, the mcp25625 have integrated transceiver.

This patch add the mcp25625 to the device tree bindings documentation.

Signed-off-by: Sean Nyekjaer 
Signed-off-by: Marc Kleine-Budde 
Signed-off-by: Sasha Levin

dt-bindings: eeprom: at24: add "atmel,24c2048" compatible string

2019-02-20T09:20:44+00:00

commit 6c0c5dc33ff42af49243e94842d0ebdb153189ea upstream.

Add new compatible to the device tree bindings.

Signed-off-by: Adrian Bunk 
Acked-by: Rob Herring 
Signed-off-by: Bartosz Golaszewski 
Signed-off-by: Sasha Levin

can: hi311x: Use level-triggered interrupt

2018-12-01T08:42:53+00:00

commit f164d0204b1156a7e0d8d1622c1a8d25752befec upstream.

If the hi3110 shares the SPI bus with another traffic-intensive device
and packets are received in high volume (by a separate machine sending
with "cangen -g 0 -i -x"), reception stops after a few minutes and the
counter in /proc/interrupts stops incrementing.  Bus state is "active".
Bringing the interface down and back up reconvenes the reception.  The
issue is not observed when the hi3110 is the sole device on the SPI bus.

Using a level-triggered interrupt makes the issue go away and lets the
hi3110 successfully receive 2 GByte over the course of 5 days while a
ks8851 Ethernet chip on the same SPI bus handles 6 GByte of traffic.

Unfortunately the hi3110 datasheet is mum on the trigger type.  The pin
description on page 3 only specifies the polarity (active high):
http://www.holtic.com/documents/371-hi-3110_v-rev-kpdf.do

Cc: Mathias Duckeck 
Cc: Akshay Bhat 
Cc: Casey Fitzpatrick 
Signed-off-by: Lukas Wunner 
Cc: linux-stable 
Signed-off-by: Marc Kleine-Budde 
Signed-off-by: Greg Kroah-Hartman