linux-stable.git/Documentation/devicetree, branch v3.16.67

arm: spear13xx: Fix dmas cells

2018-06-16T21:21:50+00:00

commit cdd10409914184c7eee5ae3e11beb890c9c16c61 upstream.

The "dmas" cells for the designware DMA controller need to have only 3
properties apart from the phandle: request line, src master and
destination master. But the commit 6e8887f60f60 updated it incorrectly
while moving from platform code to DT. Fix it.

Fixes: 6e8887f60f60 ("ARM: SPEAr13xx: Pass generic DW DMAC platform data from DT")
Reported-by: Arnd Bergmann 
Signed-off-by: Viresh Kumar 
Signed-off-by: Olof Johansson 
Signed-off-by: Ben Hutchings

ASoC: cs42l56: Fix reset GPIO name in example DT binding

2018-02-13T18:42:19+00:00

commit 8adc430603d67e76a0f8491df21654f691acda62 upstream.

The binding states the reset GPIO property shall be named
"cirrus,gpio-nreset" and this is what the driver looks for,
but the example uses "gpio-reset". Fix this here.

Fixes: 3bb40619aca8 ("ASoC: cs42l56: bindings: sound: Add bindings for CS42L56 CODEC")

Signed-off-by: Andrew F. Davis 
Signed-off-by: Mark Brown 
Signed-off-by: Ben Hutchings

ARM: dts: imx31: fix clock control module interrupts description

2017-03-16T02:26:18+00:00

commit 2e575cbc930901718cc18e084566ecbb9a4b5ebb upstream.

The type of AVIC interrupt controller found on i.MX31 is one-cell,
namely 31 for CCM DVFS and 53 for CCM, however for clock control
module its interrupts are specified as 3-cells, fix it.

Fixes: ef0e4a606fb6 ("ARM: mx31: Replace clk_register_clkdev with clock DT lookup")
Acked-by: Rob Herring 
Signed-off-by: Vladimir Zapolskiy 
Signed-off-by: Shawn Guo 
Signed-off-by: Ben Hutchings

spi: pl022: Specify 'num-cs' property as required in devicetree binding

2015-08-10T08:54:05+00:00

commit ea6055c46eda1e19e02209814955e13f334bbe1b upstream.

Since commit 39a6ac11df65 ("spi/pl022: Devicetree support w/o platform data")
the 'num-cs' parameter cannot be passed through platform data when probing
with devicetree. Instead, it's a required devicetree property.

Fix the binding documentation so the property is properly specified.

Fixes: 39a6ac11df65 ("spi/pl022: Devicetree support w/o platform data")
Signed-off-by: Ezequiel Garcia 
Signed-off-by: Mark Brown 
Signed-off-by: Luis Henriques

net: mvneta: introduce compatible string "marvell, armada-xp-neta"

2015-07-15T09:01:00+00:00

commit f522a975a8101895a85354b9c143f41b8248e71a upstream.

The mvneta driver supports the Ethernet IP found in the Armada 370, XP,
380 and 385 SoCs. Since at least one more hardware feature is available
for the Armada XP SoCs then a way to identify them is needed.

This patch introduces a new compatible string "marvell,armada-xp-neta".

Signed-off-by: Simon Guinot 
Fixes: c5aff18204da ("net: mvneta: driver for Marvell Armada 370/XP network unit")
Acked-by: Gregory CLEMENT 
Acked-by: Thomas Petazzoni 
Signed-off-by: David S. Miller 
Signed-off-by: Luis Henriques

pinctrl: mvebu: armada-xp: fix functions of MPP48

2015-07-15T09:00:29+00:00

commit ea78b9511a54d0de026e04b5da86b30515072f31 upstream.

There was a mistake in the definition of the functions for MPP48 on
Marvell Armada XP. The second function is dev(clkout), and not tclk.

Signed-off-by: Thomas Petazzoni 
Fixes: 463e270f766a ("pinctrl: mvebu: add pinctrl driver for Armada XP")
Signed-off-by: Linus Walleij 
Signed-off-by: Luis Henriques

pinctrl: mvebu: armada-xp: remove non-existing VDD cpu_pd functions

2015-07-15T09:00:28+00:00

commit 80b3d04feab5e69d51cb2375eb989a7165e43e3b upstream.

The latest version of the Armada XP datasheet no longer documents the
VDD cpu_pd functions, which might indicate they are not working and/or
not supported. This commit ensures the pinctrl driver matches the
datasheet.

Signed-off-by: Thomas Petazzoni 
Fixes: 463e270f766a ("pinctrl: mvebu: add pinctrl driver for Armada XP")
Signed-off-by: Linus Walleij 
Signed-off-by: Luis Henriques

pinctrl: mvebu: armada-xp: remove non-existing NAND pins

2015-07-15T09:00:28+00:00

commit bc99357f3690c11817756adfee0ece811a3db2e7 upstream.

After updating to a more recent version of the Armada XP datasheet, we
realized that some of the pins documented as having a NAND-related
functionality in fact did not have such functionality. This commit
updates the pinctrl driver accordingly.

Signed-off-by: Thomas Petazzoni 
Fixes: 463e270f766a ("pinctrl: mvebu: add pinctrl driver for Armada XP")
Signed-off-by: Linus Walleij 
Signed-off-by: Luis Henriques

pinctrl: mvebu: armada-375: remove non-existing NAND re/we pins

2015-07-15T09:00:27+00:00

commit e5447d26092c72ef3346615ee558c9112ef8063f upstream.

After updating to a more recent version of the Armada 375, we realized
that some of the pins documented as having a NAND-related
functionality in fact did not have such functionality. This commit
updates the pinctrl driver accordingly.

Signed-off-by: Thomas Petazzoni 
Fixes: ce3ed59dcddd ("pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 375")
Signed-off-by: Linus Walleij 
Signed-off-by: Luis Henriques

pinctrl: mvebu: armada-370: fix spi0 pin description

2015-07-15T09:00:27+00:00

commit 438881dfddb9107ef0eb30b49368e91e092f0b3e upstream.

Due to a mistake, the CS0 and CS1 SPI0 functions were incorrectly
named "spi0-1" instead of just "spi0". This commit fixes that.

This DT binding change does not affect any of the in-tree users.

Signed-off-by: Thomas Petazzoni 
Fixes: 5f597bb2be57 ("pinctrl: mvebu: add pinctrl driver for Armada 370")
Signed-off-by: Linus Walleij 
Signed-off-by: Luis Henriques