linux-stable.git/Documentation/devicetree/bindings/timer, branch v3.17 Linux kernel stable tree clocksource: clps711x: Add DT bindings documentation 2014-07-23T10:02:36+00:00 Alexander Shiyan shc_work@mail.ru 2014-07-13T04:45:36+00:00 fd944da37fab391cfd80d649b511d777123ee6f9 This patch adds DT binding documentation for the Cirrus Logic CLPS711X-based CPUs clocksource subsystem. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> 
This patch adds DT binding documentation for the Cirrus Logic
CLPS711X-based CPUs clocksource subsystem.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
dt-bindings: Add mtk-timer bindings 2014-07-23T10:02:32+00:00 Matthias Brugger matthias.bgg@gmail.com 2014-07-18T09:36:46+00:00 98c6bf2a2d426d7c6a07997a48443b2f60190d71 Add binding documentation for the General Purpose Timer driver of the Mediatek SoCs. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> 
Add binding documentation for the General Purpose Timer driver of
the Mediatek SoCs.

Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
clocksource: sh_mtu2: Add DT support 2014-07-04T13:50:29+00:00 Laurent Pinchart laurent.pinchart+renesas@ideasonboard.com 2014-03-04T17:28:26+00:00 cca8d0596c4c7acb371ea1bc5eee9b404b30516a Document DT bindings and parse them in the MTU2 driver. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Wolfram Sang <wsa@sang-engineering.com> 
Document DT bindings and parse them in the MTU2 driver.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Wolfram Sang <wsa@sang-engineering.com>
clocksource: sh_tmu: Add DT support 2014-07-04T13:50:28+00:00 Laurent Pinchart laurent.pinchart+renesas@ideasonboard.com 2014-04-11T14:23:40+00:00 3e29b5543f9250bb358169cff0594f58284ece74 Document DT bindings and parse them in the TMU driver. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Simon Horman <horms+renesas@verge.net.au> 
Document DT bindings and parse them in the TMU driver.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
clocksource: sh_cmt: Add DT support 2014-07-04T13:46:17+00:00 Laurent Pinchart laurent.pinchart+renesas@ideasonboard.com 2014-02-12T16:12:40+00:00 1768aa2f4c1248051013282c6cf63b368016cb53 Document DT bindings and parse them in the CMT driver. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Simon Horman <horms+renesas@verge.net.au> 
Document DT bindings and parse them in the CMT driver.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
clocksource: ftm: Add FlexTimer Module (FTM) Timer devicetree Documentation 2014-05-23T08:12:04+00:00 Xiubo Li Li.Xiubo@freescale.com 2014-05-23T08:12:04+00:00 12e499d0ed1fa09940a573e5a8cce52b556f3c38 The FTM binding could be used on Vybrid and LS1+, add a binding document for it. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Jingchang Lu <b35083@freescale.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> 
The FTM binding could be used on Vybrid and LS1+, add a binding
document for it.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Jingchang Lu <b35083@freescale.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
clocksource: sun5i: Add support for reset controller 2014-04-22T11:56:50+00:00 Maxime Ripard maxime.ripard@free-electrons.com 2014-04-17T09:06:45+00:00 e50a00be5c420b4f28836dec281cdde4bed832a2 The Allwinner A31 that uses this timer has the timer IP asserted in reset. Add an optional reset property to the DT, and deassert the timer from reset if it's there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> 
The Allwinner A31 that uses this timer has the timer IP asserted in reset.
Add an optional reset property to the DT, and deassert the timer from reset if
it's there.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
clocksource: efm32: use $vendor,$device scheme for compatible string 2014-04-22T09:44:28+00:00 Uwe Kleine-König u.kleine-koenig@pengutronix.de 2014-03-25T14:50:44+00:00 63cc122381bda123c2b1b0137cca09f66e5be660 Wolfram Sang pointed out that "efm32,$device" is non-standard. So use the common scheme and prefix device with "efm32-". The old compatible string is left in place until arch/arm/boot/dts/efm32* is fixed. Acked-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> 
Wolfram Sang pointed out that "efm32,$device" is non-standard. So use the
common scheme and prefix device with "efm32-". The old compatible string
is left in place until arch/arm/boot/dts/efm32* is fixed.

Acked-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
clocksource: keystone: add bindings for keystone timer 2014-03-11T22:04:52+00:00 Ivan Khoronzhuk ivan.khoronzhuk@ti.com 2014-02-10T10:10:57+00:00 926b65e20dc336391dc333309d34bdf7d5fa3f3b This patch provides bindings for the 64-bit timer in the KeyStone architecture devices. The timer can be configured as a general-purpose 64-bit timer, dual general-purpose 32-bit timers. When configured as dual 32-bit timers, each half can operate in conjunction (chain mode) or independently (unchained mode) of each other. It is global timer is a free running up-counter and can generate interrupt when the counter reaches preset counter values. Documentation: http://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf Acked-by: Rob Herring <robh@kernel.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> 
This patch provides bindings for the 64-bit timer in the KeyStone
architecture devices. The timer can be configured as a general-purpose 64-bit
timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
timers, each half can operate in conjunction (chain mode) or independently
(unchained mode) of each other.

It is global timer is a free running up-counter and can generate interrupt
when the counter reaches preset counter values.

Documentation:
http://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
clocksource: sunxi: Add new compatibles 2014-03-11T22:04:46+00:00 Maxime Ripard maxime.ripard@free-electrons.com 2014-02-06T09:40:31+00:00 ec6c085cc779ae863d363e7d076b763a2a0aca4c The Allwinner A10 compatibles were following a slightly different compatible patterns than the rest of the SoCs for historical reasons. Add compatibles matching the other pattern to the timer driver for consistency, and keep the older one for backward compatibility. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> 
The Allwinner A10 compatibles were following a slightly different compatible
patterns than the rest of the SoCs for historical reasons. Add compatibles
matching the other pattern to the timer driver for consistency, and keep the
older one for backward compatibility.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>