linux-stable.git/Documentation/devicetree/bindings/memory-controllers, branch v5.12.2

Merge tag 'devicetree-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

2021-02-22T18:05:12+00:00

Pull devicetree updates from Rob Herring:

 - Sync dtc to upstream version v1.6.0-51-g183df9e9c2b9 and build host
   fdtoverlay

 - Add kbuild support to build DT overlays (%.dtbo)

 - Drop NULLifying match table in of_match_device().

   In preparation for this, there are several driver cleanups to use
   (of_)?device_get_match_data().

 - Drop pointless wrappers from DT struct device API

 - Convert USB binding schemas to use graph schema and remove old plain
   text graph binding doc

 - Convert spi-nor and v3d GPU bindings to DT schema

 - Tree wide schema fixes for if/then schemas, array size constraints,
   and undocumented compatible strings in examples

 - Handle 'no-map' correctly for already reserved memblock regions

* tag 'devicetree-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (35 commits)
  driver core: platform: Drop of_device_node_put() wrapper
  of: Remove of_dev_{get,put}()
  dt-bindings: usb: Change descibe to describe in usbmisc-imx.txt
  dt-bindings: can: rcar_canfd: Group tuples in pin control properties
  dt-bindings: power: renesas,apmu: Group tuples in cpus properties
  dt-bindings: mtd: spi-nor: Convert to DT schema format
  dt-bindings: Use portable sort for version cmp
  dt-bindings: ethernet-controller: fix fixed-link specification
  dt-bindings: irqchip: Add node name to PRUSS INTC
  dt-bindings: interconnect: Fix the expected number of cells
  dt-bindings: Fix errors in 'if' schemas
  dt-bindings: iommu: renesas,ipmmu-vmsa: Make 'power-domains' conditionally required
  dt-bindings: Fix undocumented compatible strings in examples
  kbuild: Add support to build overlays (%.dtbo)
  scripts: dtc: Remove the unused fdtdump.c file
  scripts: dtc: Build fdtoverlay tool
  scripts/dtc: Update to upstream version v1.6.0-51-g183df9e9c2b9
  scripts: dtc: Fetch fdtoverlay.c from external DTC project
  dt-bindings: thermal: sun8i: Fix misplaced schema keyword in compatible strings
  dt-bindings: iio: dac: Fix AD5686 references
  ...

dt-bindings: Add missing array size constraints

2021-01-11T23:42:25+00:00

DT properties which can have multiple entries need to specify what the
entries are and define how many entries there can be. In the case of
only a single entry, just 'maxItems: 1' is sufficient.

Add the missing entry constraints. These were found with a modified
meta-schema. Unfortunately, there are a few cases where the size
constraints are not defined such as common bindings, so the meta-schema
can't be part of the normal checks.

Cc: Jens Axboe 
Cc: Stephen Boyd 
Cc: Thierry Reding 
Cc: MyungJoo Ham 
Cc: Chanwoo Choi 
Cc: Linus Walleij 
Cc: Bartosz Golaszewski 
Cc: Jonathan Cameron 
Cc: Dmitry Torokhov 
Cc: Thomas Gleixner 
Cc: Marc Zyngier 
Cc: Mauro Carvalho Chehab 
Cc: Chen-Yu Tsai 
Cc: Ulf Hansson 
Cc: "David S. Miller" 
Cc: Jakub Kicinski 
Cc: Sebastian Reichel 
Cc: Ohad Ben-Cohen 
Cc: Bjorn Andersson 
Cc: Greg Kroah-Hartman 
Acked-by: Sebastian Reichel 
Acked-by: Jonathan Cameron  #for-iio
Acked-by: Chanwoo Choi 
Reviewed-by: Suman Anna 
Acked-by: Paul Cercueil 
Acked-by: Dmitry Torokhov 
Acked-by: Bartosz Golaszewski 
Reviewed-by: Linus Walleij 
Link: https://lore.kernel.org/r/20210104230253.2805217-1-robh@kernel.org
Signed-off-by: Rob Herring

dt-bindings: memory: renesas,rpc-if: Add support for RZ/G2 Series

2021-01-05T17:05:33+00:00

The RZ/G2 Series has the RPC-IF interface.  Update bindings to support:
r8a774a1, r8a774b1, r8a774c0, and r8a774e1

Signed-off-by: Adam Ford 
Link: https://lore.kernel.org/r/20210102115412.3402059-1-aford173@gmail.com
Signed-off-by: Krzysztof Kozlowski

Merge tag 'memory-controller-drv-tegra-5.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers

2020-12-08T23:40:02+00:00

Memory controller drivers for v5.11 - Tegra SoC, part two

Continuation of work on Tegra SoC memory controllers towards adding
interconnect support and integration with devfreq.

This brings few more patches including one which removes/fixes annoying
warning if the DTS patches get applied.  This is expected and only
informs that new features of Tegra memory controller drivers will not be
enabled however the warning itself could look worrying.

* tag 'memory-controller-drv-tegra-5.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  memory: tegra30: Support interconnect framework
  memory: tegra20: Support hardware versioning and clean up OPP table initialization
  dt-bindings: memory: tegra20-emc: Document opp-supported-hw property

Link: https://lore.kernel.org/r/20201207075758.5501-2-krzk@kernel.org
Signed-off-by: Arnd Bergmann

dt-bindings: memory: tegra20-emc: Document opp-supported-hw property

2020-12-05T13:53:33+00:00

Document opp-supported-hw property, which is not strictly necessary to
have on Tegra20, but it's very convenient to have because all other SoC
core devices will use hardware versioning, and thus, it's good to maintain
the consistency.

Signed-off-by: Dmitry Osipenko 
Acked-by: Thierry Reding 
Link: https://lore.kernel.org/r/20201203192439.16177-2-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski

Merge tag 'memory-controller-drv-tegra-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers

2020-11-26T21:05:15+00:00

Memory controller drivers for v5.11 - Tegra SoC

There is a bigger work from Dmitry Osipenko around Tegra SoC memory
controller drivers, mostly towards adding interconnect support and
integration with devfreq.  This work touches all Tegra memory controller
drivers and also few other SoC-related parts.  It's not yet finished but
the intermediate stage seems ready to merge.

Beside that Tegra 210 memory controller got few fixes and received new
swgroups (work of Nicolin Chen).

* tag 'memory-controller-drv-tegra-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: (38 commits)
  memory: tegra30-emc: Remove unnecessary of_node_put in tegra_emc_probe
  memory: tegra: Complete tegra210_swgroups
  memory: tegra30-emc: Continue probing if timings are missing in device-tree
  memory: tegra30-emc: Make driver modular
  memory: tegra30: Add FIFO sizes to memory clients
  memory: tegra20-emc: Add devfreq support
  memory: tegra20-emc: Remove IRQ number from error message
  memory: tegra20-emc: Factor out clk initialization
  memory: tegra20-emc: Use dev_pm_opp_set_clkname()
  memory: tegra: Correct stub of devm_tegra_memory_controller_get()
  memory: tegra20: Support interconnect framework
  memory: tegra20-emc: Continue probing if timings are missing in device-tree
  memory: tegra20-emc: Make driver modular
  memory: tegra-mc: Add interconnect framework
  memory: tegra: Add missing latency allowness entry for Page Table Cache
  memory: tegra: Remove superfluous error messages around platform_get_irq()
  memory: tegra: Use devm_platform_ioremap_resource()
  memory: tegra: Add and use devm_tegra_memory_controller_get()
  dt-bindings: host1x: Document new interconnect properties
  dt-bindings: tegra30-actmon: Document OPP and interconnect properties
  ...

Link: https://lore.kernel.org/r/20201126191241.23302-1-krzk@kernel.org
Signed-off-by: Arnd Bergmann

dt-bindings: memory: tegra124: emc: Document OPP table and voltage regulator

2020-11-06T18:37:19+00:00

Document new OPP table and voltage regulator properties which are needed
for supporting dynamic voltage-frequency scaling of the memory controller.
Some boards may have a fixed core voltage regulator, hence it's optional
because frequency scaling still may be desired.

Signed-off-by: Dmitry Osipenko 
Reviewed-by: Rob Herring 
Link: https://lore.kernel.org/r/20201104164923.21238-15-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski

dt-bindings: memory: tegra124: emc: Document new interconnect property

2020-11-06T18:33:58+00:00

External memory controller is interconnected with memory controller and
with external memory. Document new interconnect property which turns
External Memory Controller into interconnect provider.

Signed-off-by: Dmitry Osipenko 
Reviewed-by: Rob Herring 
Link: https://lore.kernel.org/r/20201104164923.21238-14-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski

dt-bindings: memory: tegra124: mc: Document new interconnect property

2020-11-06T18:33:39+00:00

Memory controller is interconnected with memory clients and with the
External Memory Controller. Document new interconnect property which
turns memory controller into interconnect provider.

Signed-off-by: Dmitry Osipenko 
Acked-by: Rob Herring 
Link: https://lore.kernel.org/r/20201104164923.21238-13-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski

dt-bindings: memory: tegra30: emc: Document OPP table and voltage regulator

2020-11-06T18:32:10+00:00

Document new OPP table and voltage regulator properties which are needed
for supporting dynamic voltage-frequency scaling of the memory controller.
Some boards may have a fixed core voltage regulator, hence it's optional
because frequency scaling still may be desired.

Signed-off-by: Dmitry Osipenko 
Reviewed-by: Rob Herring 
Link: https://lore.kernel.org/r/20201104164923.21238-12-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski