<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/Documentation/devicetree/bindings/interrupt-controller, branch v6.11</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>Merge tag 'irq-core-2024-07-15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2024-07-22T20:52:05+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2024-07-22T20:52:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=ac7473a179d65f6c5de06a4b10d3b3d36df3f172'/>
<id>ac7473a179d65f6c5de06a4b10d3b3d36df3f172</id>
<content type='text'>
Pull interrupt subsystem updates from Thomas Gleixner:
 "Core:

   - Provide a new mechanism to create interrupt domains. The existing
     interfaces have already too many parameters and it's a pain to
     expand any of this for new required functionality.

     The new function takes a pointer to a data structure as argument.
     The data structure combines all existing parameters and allows for
     easy extension.

     The first extension for this is to handle the instantiation of
     generic interrupt chips at the core level and to allow drivers to
     provide extra init/exit callbacks.

     This is necessary to do the full interrupt chip initialization
     before the new domain is published, so that concurrent usage sites
     won't see a half initialized interrupt domain. Similar problems
     exist on teardown.

     This has turned out to be a real problem due to the deferred and
     parallel probing which was added in recent years.

     Handling this at the core level allows to remove quite some accrued
     boilerplate code in existing drivers and avoids horrible
     workarounds at the driver level.

   - The usual small improvements all over the place

  Drivers:

   - Add support for LAN966x OIC and RZ/Five SoC

   - Split the STM ExtI driver into a microcontroller and a SMP version
     to allow building the latter as a module for multi-platform
     kernels

   - Enable MSI support for Armada 370XP on platforms which do not
     support IPIs

   - The usual small fixes and enhancements all over the place"

* tag 'irq-core-2024-07-15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (59 commits)
  irqdomain: Fix the kernel-doc and plug it into Documentation
  genirq: Set IRQF_COND_ONESHOT in request_irq()
  irqchip/imx-irqsteer: Handle runtime power management correctly
  irqchip/gic-v3: Pass #redistributor-regions to gic_of_setup_kvm_info()
  irqchip/bcm2835: Enable SKIP_SET_WAKE and MASK_ON_SUSPEND
  irqchip/gic-v4: Make sure a VPE is locked when VMAPP is issued
  irqchip/gic-v4: Substitute vmovp_lock for a per-VM lock
  irqchip/gic-v4: Always configure affinity on VPE activation
  Revert "irqchip/dw-apb-ictl: Support building as module"
  Revert "Loongarch: Support loongarch avec"
  arm64: Kconfig: Allow build irq-stm32mp-exti driver as module
  ARM: stm32: Allow build irq-stm32mp-exti driver as module
  irqchip/stm32mp-exti: Allow building as module
  irqchip/stm32mp-exti: Rename internal symbols
  irqchip/stm32-exti: Split MCU and MPU code
  arm64: Kconfig: Select STM32MP_EXTI on STM32 platforms
  ARM: stm32: Use different EXTI driver on ARMv7m and ARMv7a
  irqchip/stm32-exti: Add CONFIG_STM32MP_EXTI
  irqchip/dw-apb-ictl: Support building as module
  irqchip/riscv-aplic: Simplify the initialization code
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull interrupt subsystem updates from Thomas Gleixner:
 "Core:

   - Provide a new mechanism to create interrupt domains. The existing
     interfaces have already too many parameters and it's a pain to
     expand any of this for new required functionality.

     The new function takes a pointer to a data structure as argument.
     The data structure combines all existing parameters and allows for
     easy extension.

     The first extension for this is to handle the instantiation of
     generic interrupt chips at the core level and to allow drivers to
     provide extra init/exit callbacks.

     This is necessary to do the full interrupt chip initialization
     before the new domain is published, so that concurrent usage sites
     won't see a half initialized interrupt domain. Similar problems
     exist on teardown.

     This has turned out to be a real problem due to the deferred and
     parallel probing which was added in recent years.

     Handling this at the core level allows to remove quite some accrued
     boilerplate code in existing drivers and avoids horrible
     workarounds at the driver level.

   - The usual small improvements all over the place

  Drivers:

   - Add support for LAN966x OIC and RZ/Five SoC

   - Split the STM ExtI driver into a microcontroller and a SMP version
     to allow building the latter as a module for multi-platform
     kernels

   - Enable MSI support for Armada 370XP on platforms which do not
     support IPIs

   - The usual small fixes and enhancements all over the place"

* tag 'irq-core-2024-07-15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (59 commits)
  irqdomain: Fix the kernel-doc and plug it into Documentation
  genirq: Set IRQF_COND_ONESHOT in request_irq()
  irqchip/imx-irqsteer: Handle runtime power management correctly
  irqchip/gic-v3: Pass #redistributor-regions to gic_of_setup_kvm_info()
  irqchip/bcm2835: Enable SKIP_SET_WAKE and MASK_ON_SUSPEND
  irqchip/gic-v4: Make sure a VPE is locked when VMAPP is issued
  irqchip/gic-v4: Substitute vmovp_lock for a per-VM lock
  irqchip/gic-v4: Always configure affinity on VPE activation
  Revert "irqchip/dw-apb-ictl: Support building as module"
  Revert "Loongarch: Support loongarch avec"
  arm64: Kconfig: Allow build irq-stm32mp-exti driver as module
  ARM: stm32: Allow build irq-stm32mp-exti driver as module
  irqchip/stm32mp-exti: Allow building as module
  irqchip/stm32mp-exti: Rename internal symbols
  irqchip/stm32-exti: Split MCU and MPU code
  arm64: Kconfig: Select STM32MP_EXTI on STM32 platforms
  ARM: stm32: Use different EXTI driver on ARMv7m and ARMv7a
  irqchip/stm32-exti: Add CONFIG_STM32MP_EXTI
  irqchip/dw-apb-ictl: Support building as module
  irqchip/riscv-aplic: Simplify the initialization code
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'riscv-for-linus-6.11-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux</title>
<updated>2024-07-20T16:11:27+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2024-07-20T16:11:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=f557af081de6b45a25e27d633b4d8d2dbc2f428e'/>
<id>f557af081de6b45a25e27d633b4d8d2dbc2f428e</id>
<content type='text'>
Pull RISC-V updates from Palmer Dabbelt:

 - Support for various new ISA extensions:
     * The Zve32[xf] and Zve64[xfd] sub-extensios of the vector
       extension
     * Zimop and Zcmop for may-be-operations
     * The Zca, Zcf, Zcd and Zcb sub-extensions of the C extension
     * Zawrs

 - riscv,cpu-intc is now dtschema

 - A handful of performance improvements and cleanups to text patching

 - Support for memory hot{,un}plug

 - The highest user-allocatable virtual address is now visible in
   hwprobe

* tag 'riscv-for-linus-6.11-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (58 commits)
  riscv: lib: relax assembly constraints in hweight
  riscv: set trap vector earlier
  KVM: riscv: selftests: Add Zawrs extension to get-reg-list test
  KVM: riscv: Support guest wrs.nto
  riscv: hwprobe: export Zawrs ISA extension
  riscv: Add Zawrs support for spinlocks
  dt-bindings: riscv: Add Zawrs ISA extension description
  riscv: Provide a definition for 'pause'
  riscv: hwprobe: export highest virtual userspace address
  riscv: Improve sbi_ecall() code generation by reordering arguments
  riscv: Add tracepoints for SBI calls and returns
  riscv: Optimize crc32 with Zbc extension
  riscv: Enable DAX VMEMMAP optimization
  riscv: mm: Add support for ZONE_DEVICE
  virtio-mem: Enable virtio-mem for RISC-V
  riscv: Enable memory hotplugging for RISC-V
  riscv: mm: Take memory hotplug read-lock during kernel page table dump
  riscv: mm: Add memory hotplugging support
  riscv: mm: Add pfn_to_kaddr() implementation
  riscv: mm: Refactor create_linear_mapping_range() for memory hot add
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull RISC-V updates from Palmer Dabbelt:

 - Support for various new ISA extensions:
     * The Zve32[xf] and Zve64[xfd] sub-extensios of the vector
       extension
     * Zimop and Zcmop for may-be-operations
     * The Zca, Zcf, Zcd and Zcb sub-extensions of the C extension
     * Zawrs

 - riscv,cpu-intc is now dtschema

 - A handful of performance improvements and cleanups to text patching

 - Support for memory hot{,un}plug

 - The highest user-allocatable virtual address is now visible in
   hwprobe

* tag 'riscv-for-linus-6.11-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (58 commits)
  riscv: lib: relax assembly constraints in hweight
  riscv: set trap vector earlier
  KVM: riscv: selftests: Add Zawrs extension to get-reg-list test
  KVM: riscv: Support guest wrs.nto
  riscv: hwprobe: export Zawrs ISA extension
  riscv: Add Zawrs support for spinlocks
  dt-bindings: riscv: Add Zawrs ISA extension description
  riscv: Provide a definition for 'pause'
  riscv: hwprobe: export highest virtual userspace address
  riscv: Improve sbi_ecall() code generation by reordering arguments
  riscv: Add tracepoints for SBI calls and returns
  riscv: Optimize crc32 with Zbc extension
  riscv: Enable DAX VMEMMAP optimization
  riscv: mm: Add support for ZONE_DEVICE
  virtio-mem: Enable virtio-mem for RISC-V
  riscv: Enable memory hotplugging for RISC-V
  riscv: mm: Take memory hotplug read-lock during kernel page table dump
  riscv: mm: Add memory hotplugging support
  riscv: mm: Add pfn_to_kaddr() implementation
  riscv: mm: Refactor create_linear_mapping_range() for memory hot add
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'mips_6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux</title>
<updated>2024-07-20T16:03:36+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2024-07-20T16:03:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=d2be38b9a5514dbc7dc0c96a2a7f619fcddce00d'/>
<id>d2be38b9a5514dbc7dc0c96a2a7f619fcddce00d</id>
<content type='text'>
Pull MIPS updates from Thomas Bogendoerfer:

 - add support for Realtek RTL9302C

 - add support for Mobileye EyeQ6H

 - add support for Mobileye EyeQ OLB system controller

 - improve r4k clocksource

 - add mode for emulating ieee754 NAN2008

 - rework for BMIPS CBR address handling

 - fixes for Loongson 2K1000

 - defconfig updates

 - cleanups and fixes

* tag 'mips_6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (58 commits)
  MIPS: config: Add ip30_defconfig
  MIPS: config: lemote2f: Regenerate defconfig
  MIPS: config: generic: Add board-litex
  MIPS: config: Enable MSA and virtualization for MIPS64R6
  MIPS: Fix fallback march for SB1
  mips: dts: realtek: Add RTL9302C board
  mips: generic: add fdt fixup for Realtek reference board
  mips: select REALTEK_OTTO_TIMER for Realtek platforms
  dt-bindings: interrupt-controller: realtek,rtl-intc: Add rtl9300-intc
  dt-bindings: mips: realtek: Add rtl930x-soc compatible
  dt-bindings: vendor-prefixes: Add Cameo Communications
  mips: dts: realtek: add device_type property to cpu node
  mips: dts: realtek: use "serial" instead of "uart" in node name
  MIPS: Implement ieee754 NAN2008 emulation mode
  MIPS: lantiq: improve USB initialization
  MIPS: GIC: Generate redirect block accessors
  MIPS: CPS: Add a couple of multi-cluster utility functions
  MIPS: Octeron: remove source file executable bit
  MAINTAINERS: Mobileye: add OLB drivers and dt-bindings
  MIPS: mobileye: eyeq5: add OLB system-controller node
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull MIPS updates from Thomas Bogendoerfer:

 - add support for Realtek RTL9302C

 - add support for Mobileye EyeQ6H

 - add support for Mobileye EyeQ OLB system controller

 - improve r4k clocksource

 - add mode for emulating ieee754 NAN2008

 - rework for BMIPS CBR address handling

 - fixes for Loongson 2K1000

 - defconfig updates

 - cleanups and fixes

* tag 'mips_6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (58 commits)
  MIPS: config: Add ip30_defconfig
  MIPS: config: lemote2f: Regenerate defconfig
  MIPS: config: generic: Add board-litex
  MIPS: config: Enable MSA and virtualization for MIPS64R6
  MIPS: Fix fallback march for SB1
  mips: dts: realtek: Add RTL9302C board
  mips: generic: add fdt fixup for Realtek reference board
  mips: select REALTEK_OTTO_TIMER for Realtek platforms
  dt-bindings: interrupt-controller: realtek,rtl-intc: Add rtl9300-intc
  dt-bindings: mips: realtek: Add rtl930x-soc compatible
  dt-bindings: vendor-prefixes: Add Cameo Communications
  mips: dts: realtek: add device_type property to cpu node
  mips: dts: realtek: use "serial" instead of "uart" in node name
  MIPS: Implement ieee754 NAN2008 emulation mode
  MIPS: lantiq: improve USB initialization
  MIPS: GIC: Generate redirect block accessors
  MIPS: CPS: Add a couple of multi-cluster utility functions
  MIPS: Octeron: remove source file executable bit
  MAINTAINERS: Mobileye: add OLB drivers and dt-bindings
  MIPS: mobileye: eyeq5: add OLB system-controller node
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'devicetree-for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux</title>
<updated>2024-07-18T01:07:31+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2024-07-18T01:07:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=0ffb8a4c96e55ecf0e572aec1a0220af3da84e22'/>
<id>0ffb8a4c96e55ecf0e572aec1a0220af3da84e22</id>
<content type='text'>
Pull devicetree updates from Rob Herring:
 "DT Bindings:

   - Convert and add a bunch of IBM FSI related bindings

   - Add a new schema listing legacy compatibles which will (probably)
     never be documented. This will silence various checks warning about
     them.

   - Add bindings for Sierra Wireless mangOH Green SPI IoT interface,
     new Arm 2024 Cortex and Neoverse CPUs, QCom sc8180x PDC, QCom SDX75
     GPI DMA, imx8mp/imx8qxp fsl,irqsteer, and Renesas RZ/G2UL CRU and
     CSI-2 blocks

   - Convert Spreadtrum sprd-timer, FSL cpm_qe, FSL fsl,ls-scfg-msi, FSL
     q(b)man-*, FSL qoriq-mc, and img,pdc-wdt bindings to DT schema

   - Drop obsolete stericsson,abx500.txt

  DT core:

   - Update dtc to upstream version v1.7.0-93-g1df7b047fe43

   - Add support to run DT validation on DTs with applied overlays

   - Add helper for creating boolean properties in dynamic nodes and use
     that for dynamic PCI nodes

   - Clean-up early parsing of '#{address,size}-cells'"

* tag 'devicetree-for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (39 commits)
  dt-bindings: timer: sprd-timer: convert to YAML
  dt-bindings: incomplete-devices: document devices without bindings
  dt-bindings: trivial-devices: document the Sierra Wireless mangOH Green SPI IoT interface
  scripts/dtc: Update to upstream version v1.7.0-93-g1df7b047fe43
  dt-bindings: soc: fsl: Add fsl,ls1028a-reset for reset syscon node
  dt-bindings: soc: fsl: cpm_qe: convert to yaml format
  dt-bindings: i2c: i2c-fsi: Convert to json-schema
  dt-bindings: fsi: Document the FSI Hub Controller
  dt-bindings: fsi: Document the AST2700 FSI controller
  dt-bindings: fsi: ast2600-fsi-master: Convert to json-schema
  dt-bindings: fsi: ibm,i2cr-fsi-master: Reference common FSI controller
  dt-bindings: fsi: Document the FSI controller common properties
  dt-bindings: fsi: Document the IBM SBEFIFO engine
  dt-bindings: fsi: p9-occ: Convert to json-schema
  dt-bindings: fsi: Document the IBM SCOM engine
  dt-bindings: fsi: fsi2spi: Document SPI controller child nodes
  dt-bindings: interrupt-controller: convert fsl,ls-scfg-msi to yaml
  dt-bindings: soc: fsl: Convert q(b)man-* to yaml format
  dt-bindings: misc: fsl,qoriq-mc: convert to yaml format
  dt-bindings: drop stale Anson Huang from maintainers
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull devicetree updates from Rob Herring:
 "DT Bindings:

   - Convert and add a bunch of IBM FSI related bindings

   - Add a new schema listing legacy compatibles which will (probably)
     never be documented. This will silence various checks warning about
     them.

   - Add bindings for Sierra Wireless mangOH Green SPI IoT interface,
     new Arm 2024 Cortex and Neoverse CPUs, QCom sc8180x PDC, QCom SDX75
     GPI DMA, imx8mp/imx8qxp fsl,irqsteer, and Renesas RZ/G2UL CRU and
     CSI-2 blocks

   - Convert Spreadtrum sprd-timer, FSL cpm_qe, FSL fsl,ls-scfg-msi, FSL
     q(b)man-*, FSL qoriq-mc, and img,pdc-wdt bindings to DT schema

   - Drop obsolete stericsson,abx500.txt

  DT core:

   - Update dtc to upstream version v1.7.0-93-g1df7b047fe43

   - Add support to run DT validation on DTs with applied overlays

   - Add helper for creating boolean properties in dynamic nodes and use
     that for dynamic PCI nodes

   - Clean-up early parsing of '#{address,size}-cells'"

* tag 'devicetree-for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (39 commits)
  dt-bindings: timer: sprd-timer: convert to YAML
  dt-bindings: incomplete-devices: document devices without bindings
  dt-bindings: trivial-devices: document the Sierra Wireless mangOH Green SPI IoT interface
  scripts/dtc: Update to upstream version v1.7.0-93-g1df7b047fe43
  dt-bindings: soc: fsl: Add fsl,ls1028a-reset for reset syscon node
  dt-bindings: soc: fsl: cpm_qe: convert to yaml format
  dt-bindings: i2c: i2c-fsi: Convert to json-schema
  dt-bindings: fsi: Document the FSI Hub Controller
  dt-bindings: fsi: Document the AST2700 FSI controller
  dt-bindings: fsi: ast2600-fsi-master: Convert to json-schema
  dt-bindings: fsi: ibm,i2cr-fsi-master: Reference common FSI controller
  dt-bindings: fsi: Document the FSI controller common properties
  dt-bindings: fsi: Document the IBM SBEFIFO engine
  dt-bindings: fsi: p9-occ: Convert to json-schema
  dt-bindings: fsi: Document the IBM SCOM engine
  dt-bindings: fsi: fsi2spi: Document SPI controller child nodes
  dt-bindings: interrupt-controller: convert fsl,ls-scfg-msi to yaml
  dt-bindings: soc: fsl: Convert q(b)man-* to yaml format
  dt-bindings: misc: fsl,qoriq-mc: convert to yaml format
  dt-bindings: drop stale Anson Huang from maintainers
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: interrupt-controller: realtek,rtl-intc: Add rtl9300-intc</title>
<updated>2024-07-12T11:12:00+00:00</updated>
<author>
<name>Chris Packham</name>
<email>chris.packham@alliedtelesis.co.nz</email>
</author>
<published>2024-07-10T04:35:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=371c358d523f3e6878587ddb16dd61a4a89bef9e'/>
<id>371c358d523f3e6878587ddb16dd61a4a89bef9e</id>
<content type='text'>
Add a compatible string for the interrupt controller found on the
rtl930x SoCs. The interrupt controller has registers for VPE1 so these
are added as a second reg cell.

Signed-off-by: Chris Packham &lt;chris.packham@alliedtelesis.co.nz&gt;
Reviewed-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a compatible string for the interrupt controller found on the
rtl930x SoCs. The interrupt controller has registers for VPE1 so these
are added as a second reg cell.

Signed-off-by: Chris Packham &lt;chris.packham@alliedtelesis.co.nz&gt;
Reviewed-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: interrupt-controller: convert fsl,ls-scfg-msi to yaml</title>
<updated>2024-07-09T13:40:17+00:00</updated>
<author>
<name>Frank Li</name>
<email>Frank.Li@nxp.com</email>
</author>
<published>2024-06-27T14:42:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=c184d44a132429380d53f7b678e38b811fc9386a'/>
<id>c184d44a132429380d53f7b678e38b811fc9386a</id>
<content type='text'>
Convert device tree binding fsl,ls-scfg-msi to yaml format.

Additional changes:
- Include gic.h and use predefined macro in example.
- Remove label in example.
- Change node name to interrupt-controller in example.
- Fix error in example.
- ls1046a allow 4 irqs, other platform only 1 irq.
- Add $ref: msi-controller.yaml
- Add #msi-cells.

Signed-off-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Link: https://lore.kernel.org/r/20240627144207.4003708-1-Frank.Li@nxp.com
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Convert device tree binding fsl,ls-scfg-msi to yaml format.

Additional changes:
- Include gic.h and use predefined macro in example.
- Remove label in example.
- Change node name to interrupt-controller in example.
- Fix error in example.
- ls1046a allow 4 irqs, other platform only 1 irq.
- Add $ref: msi-controller.yaml
- Add #msi-cells.

Signed-off-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Link: https://lore.kernel.org/r/20240627144207.4003708-1-Frank.Li@nxp.com
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: interrupt-controller: qcom,pdc: Add sc8180x PDC</title>
<updated>2024-07-08T23:40:30+00:00</updated>
<author>
<name>Bjorn Andersson</name>
<email>quic_bjorande@quicinc.com</email>
</author>
<published>2024-05-25T18:05:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e69956584ddf90b83fa89b113f4960b8d653d4d2'/>
<id>e69956584ddf90b83fa89b113f4960b8d653d4d2</id>
<content type='text'>
The SC8180X platform has a PDC block, add a compatible for this.

Signed-off-by: Bjorn Andersson &lt;quic_bjorande@quicinc.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Link: https://lore.kernel.org/r/20240525-sc8180x-pdc-binding-compatible-v1-1-17031c85ed69@quicinc.com
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The SC8180X platform has a PDC block, add a compatible for this.

Signed-off-by: Bjorn Andersson &lt;quic_bjorande@quicinc.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Link: https://lore.kernel.org/r/20240525-sc8180x-pdc-binding-compatible-v1-1-17031c85ed69@quicinc.com
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: interrupt-controller: fsl,irqsteer: Add imx8mp/imx8qxp support</title>
<updated>2024-07-08T23:40:30+00:00</updated>
<author>
<name>Alexander Stein</name>
<email>alexander.stein@ew.tq-group.com</email>
</author>
<published>2024-05-28T07:11:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=d8d301a1d220bdc5e31f4f70e66c1df0cd01a7ca'/>
<id>d8d301a1d220bdc5e31f4f70e66c1df0cd01a7ca</id>
<content type='text'>
Some SoC like i.MX8MP or i.MX8QXP use a power-domain for this IP. Add
SoC-specific compatibles, which also requires a power-domain.

Signed-off-by: Alexander Stein &lt;alexander.stein@ew.tq-group.com&gt;
Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Link: https://lore.kernel.org/r/20240528071141.92003-2-alexander.stein@ew.tq-group.com
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some SoC like i.MX8MP or i.MX8QXP use a power-domain for this IP. Add
SoC-specific compatibles, which also requires a power-domain.

Signed-off-by: Alexander Stein &lt;alexander.stein@ew.tq-group.com&gt;
Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Link: https://lore.kernel.org/r/20240528071141.92003-2-alexander.stein@ew.tq-group.com
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'imx-bindings-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt</title>
<updated>2024-07-08T14:26:50+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2024-07-08T14:26:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=07fd5cc010bfcd5b6d19baebe22e4c9b1dc25dfb'/>
<id>07fd5cc010bfcd5b6d19baebe22e4c9b1dc25dfb</id>
<content type='text'>
i.MX DT bindings for 6.11:

- Add compatible string for various new boards
- Drop Li Yang as maintainer for bindings as his email bounces

* tag 'imx-bindings-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  dt-bindings: arm: fsl: document Kontron SMARC-sAMX6i boards
  dt-bindings: arm: add MBa8MP-RAS314 SBC
  dt-bindings: arm: fsl: add i.MX93 9x9 QSB board
  dt-bindings: arm: fsl: add i.MX95 19x19 EVK board
  dt-bindings: arm: fsl: Document Compulab IOT-GATE-iMX8
  dt-bindings: Drop Li Yang as maintainer for all bindings

Link: https://lore.kernel.org/r/20240702142153.413061-2-shawnguo2@yeah.net
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
i.MX DT bindings for 6.11:

- Add compatible string for various new boards
- Drop Li Yang as maintainer for bindings as his email bounces

* tag 'imx-bindings-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  dt-bindings: arm: fsl: document Kontron SMARC-sAMX6i boards
  dt-bindings: arm: add MBa8MP-RAS314 SBC
  dt-bindings: arm: fsl: add i.MX93 9x9 QSB board
  dt-bindings: arm: fsl: add i.MX95 19x19 EVK board
  dt-bindings: arm: fsl: Document Compulab IOT-GATE-iMX8
  dt-bindings: Drop Li Yang as maintainer for all bindings

Link: https://lore.kernel.org/r/20240702142153.413061-2-shawnguo2@yeah.net
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: interrupt-controller: convert marvell,mpic binding to YAML</title>
<updated>2024-06-28T15:27:44+00:00</updated>
<author>
<name>Marek Behún</name>
<email>kabel@kernel.org</email>
</author>
<published>2024-06-24T14:53:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=f7e642bcd622e1fccd150eae5b894ad3fe38930e'/>
<id>f7e642bcd622e1fccd150eae5b894ad3fe38930e</id>
<content type='text'>
Convert the marvell,mpic device-tree binding to YAML. Add myself as
maintainer.

Signed-off-by: Marek Behún &lt;kabel@kernel.org&gt;
Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Link: https://lore.kernel.org/r/20240624145355.8034-3-kabel@kernel.org
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Convert the marvell,mpic device-tree binding to YAML. Add myself as
maintainer.

Signed-off-by: Marek Behún &lt;kabel@kernel.org&gt;
Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Link: https://lore.kernel.org/r/20240624145355.8034-3-kabel@kernel.org
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
</feed>
