Pull devicetree updates from Rob Herring:

 - Rewrite of the unflattening code to avoid recursion and lessen the
   stack usage.

 - Rewrite of the phandle args parsing code to get rid of the fixed args
   size.  This is needed for IOMMU code.

 - Sync to latest dtc which adds more dts style checking.  These
   warnings are enabled with "W=1" compiles.

 - Tegra documentation updates related to the above warnings.

 - A bunch of spelling and other doc fixes.

 - Various vendor prefix additions.

* tag 'devicetree-for-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (52 commits)
  devicetree: Add Creative Technology vendor id
  gpio: dt-bindings: add ibm,ppc4xx-gpio binding
  of/unittest: Remove unnecessary module.h header inclusion
  drivers/of: Fix build warning in populate_node()
  drivers/of: Fix depth when unflattening devicetree
  of: dynamic: changeset prop-update revert fix
  drivers/of: Export of_detach_node()
  drivers/of: Return allocated memory from of_fdt_unflatten_tree()
  drivers/of: Specify parent node in of_fdt_unflatten_tree()
  drivers/of: Rename unflatten_dt_node()
  drivers/of: Avoid recursively calling unflatten_dt_node()
  drivers/of: Split unflatten_dt_node()
  of: include errno.h in of_graph.h
  of: document refcount incrementation of of_get_cpu_node()
  Documentation: dt: soc: fix spelling mistakes
  Documentation: dt: power: fix spelling mistake
  Documentation: dt: pinctrl: fix spelling mistake
  Documentation: dt: opp: fix spelling mistake
  Documentation: dt: net: fix spelling mistakes
  Documentation: dt: mtd: fix spelling mistake
  ...

Pull MIPS updates from Ralf Baechle:
 "This is the main pull request for MIPS for 4.7.  Here's the summary of
  the changes:

   - ATH79: Support for DTB passuing using the UHI boot protocol
   - ATH79: Remove support for builtin DTB.
   - ATH79: Add zboot debug serial support.
   - ATH79: Add initial support for Dragino MS14 (Dragine 2), Onion Omega
            and DPT-Module.
   - ATH79: Update devicetree clock support for AR9132 and AR9331.
   - ATH79: Cleanup the DT code.
   - ATH79: Support newer SOCs in ath79_ddr_ctrl_init.
   - ATH79: Fix regression in PCI window initialization.
   - BCM47xx: Move SPROM driver to drivers/firmware/
   - BCM63xx: Enable partition parser in defconfig.
   - BMIPS: BMIPS5000 has I cache filing from D cache
   - BMIPS: BMIPS: Add cpu-feature-overrides.h
   - BMIPS: Add Whirlwind support
   - BMIPS: Adjust mips-hpt-frequency for BCM7435
   - BMIPS: Remove maxcpus from BCM97435SVMB DTS
   - BMIPS: Add missing 7038 L1 register cells to BCM7435
   - BMIPS: Various tweaks to initialization code.
   - BMIPS: Enable partition parser in defconfig.
   - BMIPS: Cache tweaks.
   - BMIPS: Add UART, I2C and SATA devices to DT.
   - BMIPS: Add BCM6358 and BCM63268support
   - BMIPS: Add device tree example for BCM6358.
   - BMIPS: Improve Improve BCM6328 and BCM6368 device trees
   - Lantiq: Add support for device tree file from boot loader
   - Lantiq: Allow build with no built-in DT.
   - Loongson 3: Reserve 32MB for RS780E integrated GPU.
   - Loongson 3: Fix build error after ld-version.sh modification
   - Loongson 3: Move chipset ACPI code from drivers to arch.
   - Loongson 3: Speedup irq processing.
   - Loongson 3: Add basic Loongson 3A support.
   - Loongson 3: Set cache flush handlers to nop.
   - Loongson 3: Invalidate special TLBs when needed.
   - Loongson 3: Fast TLB refill handler.
   - MT7620: Fallback strategy for invalid syscfg0.
   - Netlogic: Fix CP0_EBASE redefinition warnings
   - Octeon: Initialization fixes
   - Octeon: Add DTS files for the D-Link DSR-1000N and EdgeRouter Lite
   - Octeon: Enable add Octeon-drivers in cavium_octeon_defconfig
   - Octeon: Correctly handle endian-swapped initramfs images.
   - Octeon: Support CN73xx, CN75xx and CN78xx.
   - Octeon: Remove dead code from cvmx-sysinfo.
   - Octeon: Extend number of supported CPUs past 32.
   - Octeon: Remove some code limiting NR_IRQS to 255.
   - Octeon: Simplify octeon_irq_ciu_gpio_set_type.
   - Octeon: Mark some functions __init in smp.c
   - Octeon: Octeon: Add Octeon III CN7xxx interface detection
   - PIC32: Add serial driver and bindings for it.
   - PIC32: Add PIC32 deadman timer driver and bindings.
   - PIC32: Add PIC32 clock timer driver and bindings.
   - Pistachio: Determine SoC revision during boot
   - Sibyte: Fix Kconfig dependencies of SIBYTE_BUS_WATCHER.
   - Sibyte: Strip redundant comments from bcm1480_regs.h.
   - Panic immediately if panic_on_oops is set.
   - module: fix incorrect IS_ERR_VALUE macro usage.
   - module: Make consistent use of pr_*
   - Remove no longer needed work_on_cpu() call.
   - Remove CONFIG_IPV6_PRIVACY from defconfigs.
   - Fix registers of non-crashing CPUs in dumps.
   - Handle MIPSisms in new vmcore_elf32_check_arch.
   - Select CONFIG_HANDLE_DOMAIN_IRQ and make it work.
   - Allow RIXI to be used on non-R2 or R6 cores.
   - Reserve nosave data for hibernation
   - Fix siginfo.h to use strict POSIX types.
   - Don't unwind user mode with EVA.
   - Fix watchpoint restoration
   - Ptrace watchpoints for R6.
   - Sync icache when it fills from dcache
   - I6400 I-cache fills from dcache.
   - Various MSA fixes.
   - Cleanup MIPS_CPU_* definitions.
   - Signal: Move generic copy_siginfo to signal.h
   - Signal: Fix uapi include in exported asm/siginfo.h
   - Timer fixes for sake of KVM.
   - XPA TLB refill fixes.
   - Treat perf counter feature
   - Update John Crispin's email address
   - Add PIC32 watchdog and bindings.
   - Handle R10000 LL/SC bug in set_pte()
   - cpufreq: Various fixes for Longson1.
   - R6: Fix R2 emulation.
   - mathemu: Cosmetic fix to ADDIUPC emulation, plenty of other small fixes
   - ELF: ABI and FP fixes.
   - Allow for relocatable kernel and use that to support KASLR.
   - Fix CPC_BASE_ADDR mask
   - Plenty fo smp-cps, CM, R6 and M6250 fixes.
   - Make reset_control_ops const.
   - Fix kernel command line handling of leading whitespace.
   - Cleanups to cache handling.
   - Add brcm, bcm6345-l1-intc device tree bindings.
   - Use generic clkdev.h header
   - Remove CLK_IS_ROOT usage.
   - Misc small cleanups.
   - CM: Fix compilation error when !MIPS_CM
   - oprofile: Fix a preemption issue
   - Detect DSP ASE v3 support:1"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (275 commits)
  MIPS: pic32mzda: fix getting timer clock rate.
  MIPS: ath79: fix regression in PCI window initialization
  MIPS: ath79: make ath79_ddr_ctrl_init() compatible for newer SoCs
  MIPS: Fix VZ probe gas errors with binutils <2.24
  MIPS: perf: Fix I6400 event numbers
  MIPS: DEC: Export `ioasic_ssr_lock' to modules
  MIPS: MSA: Fix a link error on `_init_msa_upper' with older GCC
  MIPS: CM: Fix compilation error when !MIPS_CM
  MIPS: Fix genvdso error on rebuild
  USB: ohci-jz4740: Remove obsolete driver
  MIPS: JZ4740: Probe OHCI platform device via DT
  MIPS: JZ4740: Qi LB60: Remove support for AVT2 variant
  MIPS: pistachio: Determine SoC revision during boot
  MIPS: BMIPS: Adjust mips-hpt-frequency for BCM7435
  mips: mt7620: fallback to SDRAM when syscfg0 does not have a valid value for the memory type
  MIPS: Prevent "restoration" of MSA context in non-MSA kernels
  MIPS: cevt-r4k: Dynamically calculate min_delta_ns
  MIPS: malta-time: Take seconds into account
  MIPS: malta-time: Start GIC count before syncing to RTC
  MIPS: Force CPUs to lose FP context during mode switches
  ...

Pull ARC updates from Vineet Gupta:
 "We have a relatively big changeset for ARC for 4.7.

  The highlight is support for EZChip (now Mellanox) NPS-400 network
  processor, a 400-Gb throughput C-programmable packet processor based
  on ARC700 cores from Synopsys. See

        http://www.mellanox.com/related-docs/prod_npu/PB_NPS-400.pdf

  Also present are irqchip and clocksource drivers for NPS as agreed
  with respective maintainers to go via ARC tree due to an soc header
  dependency.  I have the needed ACKs from Jason, Marc, Daniel.  You
  might run into a trivial merge conflict in drivers/irqchip/*

  This EZChip platform support required some deep changes in ARC
  architecture code and also opportunity to cleanup past sins (legacy
  irq domains, missing irq domain lookup, hard coded timer irqs...)

  Summary:

   - Support for EZChip (now Mellanox) NPS-400 Network processor based
     on ARC700

   - NPS interrupt controller and clocksource drivers

   - ARC timers probed off DT

   - ARC iqrchips switching to linear domain (upgrade from legacy
     domains)"

* tag 'arc-4.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: (37 commits)
  arc: axs103_smp: Fix CPU frequency to 100MHz for dual-core
  arc: axs10x: Add DT bindings for I2S PLL Clock
  ARC: pae: STRICT_MM_TYPECHECKS was broken
  ARC: Add eznps platform to Kconfig and Makefile
  ARC: [plat-eznps] Use dedicated COMMAND_LINE_SIZE
  ARC: [plat-eznps] Use dedicated cpu_relax()
  ARC: [plat-eznps] Use dedicated identity auxiliary register.
  ARC: [plat-eznps] Use dedicated SMP barriers
  ARC: [plat-eznps] Use dedicated atomic/bitops/cmpxchg
  ARC: [plat-eznps] Use dedicated user stack top
  ARC: [plat-eznps] Add eznps platform
  ARC: [plat-eznps] Add eznps board defconfig and dts
  ARC: Mark secondary cpu online only after all HW setup is done
  ARC: rwlock: disable interrupts in !LLSC variant
  ARC: Make vmalloc size configurable
  ARC: clean out UAPI byteorder.h clean off Kconfig symbol
  irqchip: add nps Internal and external irqchips
  clocksource: Add NPS400 timers driver
  soc: Support for EZchip SoC
  Documentation: Add EZchip vendor to binding list
  ...

Pull ARM DT updates from Arnd Bergmann:
 "These are all the updates to device tree files for 32-bit platforms,
  which as usual makes up the bulk of the ARM SoC changes: 462 non-merge
  changesets, 450 files changed, 23340 insertions, 5216 deletions.

  The three platforms that are added with the "soc" branch are here as
  well, and we add some related machine files:

   - For Aspeed AST2400/AST2500, we get the evaluation platform and the
     Tyan Palmetto POWER8 mainboard that uses the AST2400 BMC
   - For Oxnas 810SE, the Western Digital "My Book World Edition" is
     added as the only platform at the moment.
   - For ARM MPS2, the AN385 (Cortex-M3) and AN399 (Cortex-M7) are
     supported

  On the ARM Realview development platform, we now support all machines
  with device tree, previously only the board files were supported,
  which in turn will likely be removed soon.

  Qualcomm IPQ4019 is the second generation ARM based "Internet
  Processor", following the IPQ806x that is used in many high-end WiFi
  routers.  This one integrates two ath10k wifi radios that were
  previously on separate chips.

  Other boards that got added for existing chips are:

  Ti OMAP family:
     - Amazon Kindle Fire, first generation, tablet and ebook reader
     - OnRISC Baltos iR 2110 and 3220 embedded industrial PCs
     - TI AM5728 IDK, TI AM3359 ICE-V2, and TI DRA722 Rev C EVM
       development systems

  Samsung EXYNOS platform:
     - Samsung ARTIK5 evaluation board, see

        https://www.artik.io/modules/overview/artik-5/

  NXP i.MX platforms:
     - Ka-Ro electronics TX6S-8034, TX6S-8035, TX6U-8033, TX6U-81xx,
       TX6Q-1036, TX6Q-1110/-1130, TXUL-0010 and TXUL-0011 industrial
       SoM modules
     - Embest MarS Board i.MX6Dual DIY platform
     - Boundary Devices i.MX6 Quad Plus Nitrogen6_MAX and SoloX
       Nitrogen6sx embedded boards
     - Technexion Pico i.MX6UL compute module
     - ZII VF610 Development Board

  Marvell embedded (mvebu, orion, kirkwood) platforms:
     - Linksys Viper (E4200v2 / EA4500) WiFi router
     - Buffalo Kurobox Pro NAS

  Qualcomm Snapdragon:
     - Arrow DragonBoard 600c (96boards) with APQ8064 Snapdragon 600

  Rockchips platform:
     - mqmaker MiQi single-board computer

  Altera SoCFPGA:
     - samtec VIN|ING 1000 vehicle communication interface

  Allwinner Sunxi platforms:
     - Dserve DSRV9703C tablet
     - Difrnce DIT4350 tablet
     - Colorfly E708 Q1 tablet
     - Polaroid MID2809PXE04 tablet
     - Olimex A20 OLinuXino LIME2 single board computer
     - Xunlong Orange Pi 2, Orange Pi One, and Orange Pi PC single board
       computers

  Across many platforms, bug fixes went in to address warnings that dtc
  now emits with 'make dtbs W=1'.  Further changes for device enablement
  went into Ti OMAP, bcm283x (Raspberry Pi), bcm47xx (wifi router), Ti
  Davinci, Samsung EXYNOS, Marvell mvebu/kirkwood/orion, NXP i.MX/Vybrid
  NXP LPC18xx, NXP LPC32xx, Renesas shmobile/r-mobile/r-car, Rockchips
  rk3xxx, ST Ux500, ST STi, Atmel AT91/SAMA5, Altera SoCFPGA, Allwinner
  Sunxi, Sigma Designs Tango, NVIDIA Tegra, Socionext Uniphier and ARM
  Versatile Express"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (458 commits)
  ARM: dts: tango4: Import watchdog node
  ARM: dts: tango4: Update cpus node for cpufreq
  ARM: dts: tango4: Update DT to match clk driver
  ARM: dts: tango4: Initial thermal support
  arm/dst: Add Aspeed ast2500 device tree
  arm/dts: Add Aspeed ast2400 device tree
  ARM: sun7i: dt: Add pll3 and pll7 clocks
  ARM: dts: sunxi: Add a olinuxino-lime2-emmc
  ARM: dts: at91: sama5d4: add trng node
  ARM: dts: at91: sama5d3: add trng node
  ARM: dts: at91: sama5d2: add trng node
  ARM: dts: at91: at91sam9g45 family: reduce the trng register map size
  ARM: sun4i: dt: Add pll3 and pll7 clocks
  ARM: sun5i: chip: Enable the TV Encoder
  ARM: sun5i: r8: Add display blocks to the DTSI
  ARM: sun5i: a13: Add display and TCON clocks
  ARM: dts: ux500: configure the accelerometers open drain
  ARM: mx5: dts: Enable USB OTG on M53EVK
  ARM: dts: imx6ul-14x14-evk: Add audio support
  ARM: dts: imx6qdl: Remove unneeded unit-addresses
  ...

Add device tree binding for the BCM6345 interrupt controller.

This controller is similar to the SMP-capable BCM7038 and
the BCM3380 but with packed interrupt registers.

Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11804/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Adding EZchip NPS400 support.
Internal interrupts are handled by Multi Thread Manager (MTM)
Once interrupt is serviced MTM is acked for deactivating the interrupt.
External interrupts are handled by MTM as well as at Global Interrupt
Controller (GIC) e.g. serial and network devices.

Signed-off-by: Noam Camus <noamc@ezchip.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Vineet Gupta <vgupta@synopsys.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Cc: Thomas Gleixner <tglx@linutronix.de>

Some Layerscape SoCs use a simple MSI controller implementation.
It contains only two SCFG register to trigger and describe a
group 32 MSI interrupts. The patch adds bindings to describe
the controller.

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>

Add a decription of the PPI partitioning support.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Will Deacon <will.deacon@arm.com>
Link: http://lkml.kernel.org/r/1460365075-7316-6-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

Merge "NXP LPC32xx device tree updates for v4.7" from Vladimir Zapolskiy:

This includes a few functional changes:
* new representation of MIC, SIC1 and SIC2 interrupt controllers,
* disabled by default SPI1, SPI2, SSP0 and SSP1 SPI controllers in
  shared lpc32xx.dtsi file,
* added clock sources for SPI1 and SPI2,
* set default clock rate of HCLK PLL to main osc rate multiplied by 16.

Also there are some non-functional changes:
* flatten board DTS files by exploiting device node labels,
* add 'partitions' device node for NAND SLC / MTD OF,
* correct Atmel vendor prefix to describe on board AT24 EEPROMs,
* rename board DTS files by adding SoC name prefix.

Since now DTS files of LPC32xx boards match "^lpc32[2345]0-" pattern.

* tag 'lpc32xx-dt-4.7' of git://github.com/vzapolskiy/linux-lpc32xx:
  ARM: dts: lpc32xx: phy3250: add SoC name prefix to board dts file
  ARM: dts: lpc32xx: phy3250: add NAND partitions device node
  ARM: dts: lpc32xx: phy3250: avoid extension of device nodes by absolute path
  ARM: dts: lpc32xx: ea3250: add SoC name prefix to board dts file
  ARM: dts: lpc32xx: ea3250: fix Atmel at24 eeprom vendor
  ARM: dts: lpc32xx: ea3250: add NAND partitions device node
  ARM: dts: lpc32xx: ea3250: avoid extension of device nodes by absolute path
  ARM: dts: lpc32xx: reparent SIC1 and SIC2 interrupts from MIC
  dt-bindings: interrupt-controllers: add description of SIC1 and SIC2
  ARM: dts: lpc32xx: disabled ssp0/spi1 & ssp1/spi2 by default
  ARM: dts: phy3250: enable ssp0
  ARM: dts: lpc32xx: add clock properties to spi nodes
  ARM: dts: lpc32xx: set default clock rate of HCLK PLL

NXP LPC32xx has three interrupt controllers, namely root Main
Interrupt Controller (MIC) and two supplementary Sub Interrupt
Controllers (SIC1 and SIC2), four interrupt outputs from SIC1 and SIC2
are connected to MIC.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>