linux-stable.git/Documentation/devicetree/bindings/display, branch linux-5.0.y Linux kernel stable tree Merge tag 'drm-msm-fixes-2019-01-24' of git://people.freedesktop.org/~robclark/linux into drm-fixes 2019-01-24T21:45:00+00:00 Dave Airlie airlied@redhat.com 2019-01-24T21:44:53+00:00 f0e7ce1eef5854584dfb59b3824a67edee37580f A few fixes for v5.0.. the opp-level fix and removal of hard-coded irq name is partially to make things smoother in v5.1 merge window to avoid dependency on drm vs dt trees, but are otherwise sane changes. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rob Clark <robdclark@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGsAEHd2tGRQxRTs+A-8y_tthPs2iUgCCCEwR5vDMXab4A@mail.gmail.com 
A few fixes for v5.0.. the opp-level fix and removal of hard-coded irq
name is partially to make things smoother in v5.1 merge window to
avoid dependency on drm vs dt trees, but are otherwise sane changes.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGsAEHd2tGRQxRTs+A-8y_tthPs2iUgCCCEwR5vDMXab4A@mail.gmail.com
drm/msm: drop interrupt-names 2019-01-24T20:36:33+00:00 Jordan Crouse jcrouse@codeaurora.org 2018-12-18T18:32:37+00:00 895ad6b0ccf71ec1f8d5bc4d9f15b525feb160a8 Each GPU core only uses one interrupt so we don't to look up an interrupt by name and thereby we don't need interrupt-names. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Rob Clark <robdclark@gmail.com> 
Each GPU core only uses one interrupt so we don't to look up
an interrupt by name and thereby we don't need interrupt-names.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
doc: bindings: fix bad reference to ARM CPU bindings 2019-01-11T23:12:50+00:00 Otto Sabart ottosabart@seberm.com 2019-01-08T23:46:55+00:00 8217724eb7c51bbec351b23cbc924577b2f4b8e6 The primecell.txt and cpus.txt files were converted into YAML. This patch updates old references with new ones. Fixes: d3c207eeb905 ("dt-bindings: arm: Convert primecell binding to json-schema") Fixes: 672951cbd1b7 ("dt-bindings: arm: Convert cpu binding to json-schema") Signed-off-by: Otto Sabart <ottosabart@seberm.com> Signed-off-by: Rob Herring <robh@kernel.org> 
The primecell.txt and cpus.txt files were converted into YAML. This
patch updates old references with new ones.

Fixes: d3c207eeb905 ("dt-bindings: arm: Convert primecell binding to json-schema")
Fixes: 672951cbd1b7 ("dt-bindings: arm: Convert cpu binding to json-schema")
Signed-off-by: Otto Sabart <ottosabart@seberm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
dt-bindings: msm/dsi: Add ref clock for PHYs 2018-12-11T18:07:11+00:00 Matthias Kaehlcke mka@chromium.org 2018-12-04T22:42:27+00:00 fb42b5354d71b09d3dcfcf4e38b1e98b277a0fc8 Allow the PHY drivers to get the ref clock from the DT. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Rob Clark <robdclark@gmail.com> 
Allow the PHY drivers to get the ref clock from the DT.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
dt-bindings: display: msm/gpu: document amd,imageon compatible 2018-12-11T18:07:10+00:00 Jonathan Marek jonathan@marek.ca 2018-12-04T15:17:01+00:00 e888c279579e9c2409899eb3a5e9ad5b9f91260e Document the new amd,imageon compatible, used for non-qcom hardware that uses the drm/msm driver (iMX5). Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Rob Clark <robdclark@gmail.com> 
Document the new amd,imageon compatible, used for non-qcom hardware that
uses the drm/msm driver (iMX5).

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
drm/msm/mdp4: add lcdc-align-lsb flag to control lane alignment 2018-12-11T18:07:10+00:00 Jonathan Marek jonathan@marek.ca 2018-12-04T15:16:57+00:00 f72f4f1ae498a3c93c23c3d0e600df92977e86b1 This allows controlling which of the 8 lanes are used for 6 bit color. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Rob Clark <robdclark@gmail.com> 
This allows controlling which of the 8 lanes are used for 6 bit color.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
drm/panel: simple: Add AUO G101EVN010 panel support 2018-12-03T16:04:48+00:00 Alex Gonzalez alex.gonzalez@digi.com 2018-10-25T15:09:30+00:00 4fb86404a977b932eed56c0dd0954f6225eee3eb The change adds support for the AU Optronics G101EVN010 10.1" TFT LCD panel. Signed-off-by: Alex Gonzalez <alex.gonzalez@digi.com> Reviewed-by: Rob Herring <robh@kernel.org> [treding@nvidia.com: sort new entry alphabetically] Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/1540480173-12009-2-git-send-email-alex.gonzalez@digi.com 
The change adds support for the AU Optronics G101EVN010 10.1" TFT LCD
panel.

Signed-off-by: Alex Gonzalez <alex.gonzalez@digi.com>
Reviewed-by: Rob Herring <robh@kernel.org>
[treding@nvidia.com: sort new entry alphabetically]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1540480173-12009-2-git-send-email-alex.gonzalez@digi.com
dt-bindings: display: renesas: lvds: Document r8a77965 bindings 2018-11-23T11:51:22+00:00 Laurent Pinchart laurent.pinchart+renesas@ideasonboard.com 2018-10-17T23:56:18+00:00 828ff2adaac405a1a3a10ccf6b04e7ca3de59967 The M3-N (r8a77965) includes one LVDS encoder. Extend the binding to support it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> 
The M3-N (r8a77965) includes one LVDS encoder. Extend the binding to
support it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
dt-bindings: display: renesas: du: Document the r8a7744 bindings 2018-11-23T11:51:22+00:00 Biju Das biju.das@bp.renesas.com 2018-09-21T18:08:28+00:00 5eb08d995564c9f9d4818a84050f7716b73c86cc Document the RZ/G1N (R8A7744) SoC in the R-Car DU bindings. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 
Document the RZ/G1N (R8A7744) SoC in the R-Car DU bindings.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
dt-bindings: display: renesas: du: Document the r8a77470 bindings 2018-11-23T11:51:22+00:00 Fabrizio Castro fabrizio.castro@bp.renesas.com 2018-09-21T18:08:27+00:00 aab2b5297668e86504d730bbc6c33f7b69023812 Document the RZ/G1C (r8a77470) SoC in R-Car DU bindings. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 
Document the RZ/G1C (r8a77470) SoC in R-Car DU bindings.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>