<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/Documentation/devicetree/bindings/clock, branch v6.14</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>dt-bindings: clock: qcom: Add QCS8300 video clock controller</title>
<updated>2025-02-03T02:59:04+00:00</updated>
<author>
<name>Imran Shaik</name>
<email>quic_imrashai@quicinc.com</email>
</author>
<published>2025-01-09T08:57:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=3e86e57356f0e2284454d82c7200807c6fa9e65b'/>
<id>3e86e57356f0e2284454d82c7200807c6fa9e65b</id>
<content type='text'>
The QCS8300 video clock controller is a derivative of SA8775P, but
QCS8300 has minor difference. Hence, reuse the SA8775P videocc bindings
for QCS8300 platform.

Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Signed-off-by: Imran Shaik &lt;quic_imrashai@quicinc.com&gt;
Link: https://lore.kernel.org/r/20250109-qcs8300-mm-patches-new-v4-5-63e8ac268b02@quicinc.com
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The QCS8300 video clock controller is a derivative of SA8775P, but
QCS8300 has minor difference. Hence, reuse the SA8775P videocc bindings
for QCS8300 platform.

Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Signed-off-by: Imran Shaik &lt;quic_imrashai@quicinc.com&gt;
Link: https://lore.kernel.org/r/20250109-qcs8300-mm-patches-new-v4-5-63e8ac268b02@quicinc.com
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: clock: qcom: Add CAMCC clocks for QCS8300</title>
<updated>2025-02-03T02:59:04+00:00</updated>
<author>
<name>Imran Shaik</name>
<email>quic_imrashai@quicinc.com</email>
</author>
<published>2025-01-09T08:57:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=0e193cc558e32a879c717bb2d53a1cf8628b5d20'/>
<id>0e193cc558e32a879c717bb2d53a1cf8628b5d20</id>
<content type='text'>
The QCS8300 camera clock controller is a derivative of SA8775P, but has
an additional clock and minor differences. Hence, reuse the SA8775P
camera bindings and add additional clock required for QCS8300.

Reviewed-by: Vladimir Zapolskiy &lt;vladimir.zapolskiy@linaro.org&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Imran Shaik &lt;quic_imrashai@quicinc.com&gt;
Link: https://lore.kernel.org/r/20250109-qcs8300-mm-patches-new-v4-3-63e8ac268b02@quicinc.com
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The QCS8300 camera clock controller is a derivative of SA8775P, but has
an additional clock and minor differences. Hence, reuse the SA8775P
camera bindings and add additional clock required for QCS8300.

Reviewed-by: Vladimir Zapolskiy &lt;vladimir.zapolskiy@linaro.org&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Imran Shaik &lt;quic_imrashai@quicinc.com&gt;
Link: https://lore.kernel.org/r/20250109-qcs8300-mm-patches-new-v4-3-63e8ac268b02@quicinc.com
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: clock: qcom: Add GPU clocks for QCS8300</title>
<updated>2025-02-03T02:59:04+00:00</updated>
<author>
<name>Imran Shaik</name>
<email>quic_imrashai@quicinc.com</email>
</author>
<published>2025-01-09T08:57:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=f0ada00a9b3801b71d203b0033b7612b687b7d72'/>
<id>f0ada00a9b3801b71d203b0033b7612b687b7d72</id>
<content type='text'>
The QCS8300 GPU clock controller is a derivative of SA8775P, but has few
additional clocks and minor differences. Hence, reuse gpucc bindings of
SA8775P and add additional clocks required for QCS8300.

Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Imran Shaik &lt;quic_imrashai@quicinc.com&gt;
Link: https://lore.kernel.org/r/20250109-qcs8300-mm-patches-new-v4-1-63e8ac268b02@quicinc.com
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The QCS8300 GPU clock controller is a derivative of SA8775P, but has few
additional clocks and minor differences. Hence, reuse gpucc bindings of
SA8775P and add additional clocks required for QCS8300.

Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Imran Shaik &lt;quic_imrashai@quicinc.com&gt;
Link: https://lore.kernel.org/r/20250109-qcs8300-mm-patches-new-v4-1-63e8ac268b02@quicinc.com
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branches 'clk-airoha', 'clk-rockchip', 'clk-stm', 'clk-thead' and 'clk-bcm' into clk-next</title>
<updated>2025-01-21T19:22:26+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2025-01-21T19:22:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=1d2da923fb985bb57cc161316c76edb8d567b9bd'/>
<id>1d2da923fb985bb57cc161316c76edb8d567b9bd</id>
<content type='text'>
* clk-airoha:
  clk: en7523: Add clock for eMMC for EN7581
  dt-bindings: clock: add ID for eMMC for EN7581
  dt-bindings: clock: drop NUM_CLOCKS define for EN7581
  clk: en7523: Rework clock handling for different clock numbers
  clk: en7523: Initialize num before accessing hws in en7523_register_clocks()
  clk: en7523: Fix wrong BUS clock for EN7581
  clk: amlogic: axg-audio: revert reset implementation
  Revert "clk: Fix invalid execution of clk_set_rate"

* clk-rockchip:
  clk: rockchip: rk3588: make refclko25m_ethX critical
  clk: rockchip: rk3588: drop RK3588_LINKED_CLK
  clk: rockchip: implement linked gate clock support
  clk: rockchip: expose rockchip_clk_set_lookup
  clk: rockchip: rk3588: register GATE_LINK later
  clk: rockchip: support clocks registered late

* clk-stm:
  clk: stm32f4: support spread spectrum clock generation
  clk: stm32f4: use FIELD helpers to access the PLLCFGR fields
  dt-bindings: clock: st,stm32-rcc: support spread spectrum clocking
  dt-bindings: clock: convert stm32 rcc bindings to json-schema

* clk-thead:
  clk: thead: Fix cpu2vp_clk for TH1520 AP_SUBSYS clocks
  clk: thead: Add CLK_IGNORE_UNUSED to fix TH1520 boot
  clk: thead: Fix clk gate registration to pass flags

* clk-bcm:
  clk: bcm: rpi: Add disp clock
  clk: bcm: rpi: Create helper to retrieve private data
  clk: bcm: rpi: Enable minimize for all firmware clocks
  clk: bcm: rpi: Allow cpufreq driver to also adjust gpu clocks
  clk: bcm: rpi: Add ISP to exported clocks
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* clk-airoha:
  clk: en7523: Add clock for eMMC for EN7581
  dt-bindings: clock: add ID for eMMC for EN7581
  dt-bindings: clock: drop NUM_CLOCKS define for EN7581
  clk: en7523: Rework clock handling for different clock numbers
  clk: en7523: Initialize num before accessing hws in en7523_register_clocks()
  clk: en7523: Fix wrong BUS clock for EN7581
  clk: amlogic: axg-audio: revert reset implementation
  Revert "clk: Fix invalid execution of clk_set_rate"

* clk-rockchip:
  clk: rockchip: rk3588: make refclko25m_ethX critical
  clk: rockchip: rk3588: drop RK3588_LINKED_CLK
  clk: rockchip: implement linked gate clock support
  clk: rockchip: expose rockchip_clk_set_lookup
  clk: rockchip: rk3588: register GATE_LINK later
  clk: rockchip: support clocks registered late

* clk-stm:
  clk: stm32f4: support spread spectrum clock generation
  clk: stm32f4: use FIELD helpers to access the PLLCFGR fields
  dt-bindings: clock: st,stm32-rcc: support spread spectrum clocking
  dt-bindings: clock: convert stm32 rcc bindings to json-schema

* clk-thead:
  clk: thead: Fix cpu2vp_clk for TH1520 AP_SUBSYS clocks
  clk: thead: Add CLK_IGNORE_UNUSED to fix TH1520 boot
  clk: thead: Fix clk gate registration to pass flags

* clk-bcm:
  clk: bcm: rpi: Add disp clock
  clk: bcm: rpi: Create helper to retrieve private data
  clk: bcm: rpi: Enable minimize for all firmware clocks
  clk: bcm: rpi: Allow cpufreq driver to also adjust gpu clocks
  clk: bcm: rpi: Add ISP to exported clocks
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branches 'clk-microchip', 'clk-xilinx', 'clk-allwinner', 'clk-imx' and 'clk-qcom' into clk-next</title>
<updated>2025-01-21T19:22:19+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2025-01-21T19:22:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b2fee97e6f0b6b935918744f44ca80246a18289e'/>
<id>b2fee97e6f0b6b935918744f44ca80246a18289e</id>
<content type='text'>
* clk-microchip:
  clk: at91: sama7d65: add sama7d65 pmc driver
  dt-bindings: clock: Add SAMA7D65 PMC compatible string
  dt-bindings: clocks: atmel,at91sam9x5-sckc: add sama7d65
  clk: at91: sckc: Use SCKC_{TD, MD}_SLCK IDs for clk32k clocks
  dt-bindings: clk: at91: Add clock IDs for the slow clock controller

* clk-xilinx:
  clk: clocking-wizard: calculate dividers fractional parts
  dt-bindings: clock: xilinx: Add reset GPIO for VCU
  dt-bindings: clock: xilinx: Convert VCU bindings to dtschema

* clk-allwinner:
  clk: sunxi-ng: h616: Reparent CPU clock during frequency changes
  clk: sunxi-ng: a64: stop force-selecting PLL-MIPI as TCON0 parent
  clk: sunxi-ng: a64: drop redundant CLK_PLL_VIDEO0_2X and CLK_PLL_MIPI
  dt-bindings: clock: sunxi: Export PLL_VIDEO_2X and PLL_MIPI

* clk-imx:
  clk: imx: Apply some clks only for i.MX93
  arm64: dts: imx93: Use IMX93_CLK_SPDIF_IPG as SPDIF IPG clock
  clk: imx93: Add IMX93_CLK_SPDIF_IPG clock
  dt-bindings: clock: imx93: Add SPDIF IPG clk
  clk: imx: pll14xx: Add 208 MHz and 416 MHz entries for PLL1416x
  clk: imx8mp: Fix clkout1/2 support

* clk-qcom: (63 commits)
  clk: qcom: Select CLK_X1E80100_GCC in config CLK_X1P42100_GPUCC
  dt-bindings: clock: move qcom,x1e80100-camcc to its own file
  clk: qcom: smd-rpm: Add clocks for MSM8940
  dt-bindings: clock: qcom,rpmcc: Add MSM8940 compatible
  clk: qcom: smd-rpm: Add clocks for MSM8937
  dt-bindings: clock: qcom,rpmcc: Add MSM8937 compatible
  clk: qcom: ipq5424: Use icc-clk for enabling NoC related clocks
  dt-bindings: interconnect: Add Qualcomm IPQ5424 support
  clk: qcom: Add SM6115 LPASSCC
  dt-bindings: clock: Add Qualcomm SM6115 LPASS clock controller
  clk: qcom: gcc-sdm845: Do not use shared clk_ops for QUPs
  clk: qcom: gcc-sdm845: Add general purpose clock ops
  clk: qcom: clk-rcg2: split __clk_rcg2_configure function
  clk: qcom: clk-rcg2: document calc_rate function
  clk: qcom: gcc-x1e80100: Do not turn off usb_2 controller GDSC
  clk: qcom: ipq5424: add gcc_xo_clk
  dt-bindings: clock: qcom: gcc-ipq5424: add gcc_xo_clk macro
  dt-bindings: clock: qcom: gcc-ipq5424: remove apss_dbg clock macro
  clk: qcom: ipq5424: remove apss_dbg clock
  dt-bindings: clock: qcom,sdm845-camcc: add sdm670 compatible
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* clk-microchip:
  clk: at91: sama7d65: add sama7d65 pmc driver
  dt-bindings: clock: Add SAMA7D65 PMC compatible string
  dt-bindings: clocks: atmel,at91sam9x5-sckc: add sama7d65
  clk: at91: sckc: Use SCKC_{TD, MD}_SLCK IDs for clk32k clocks
  dt-bindings: clk: at91: Add clock IDs for the slow clock controller

* clk-xilinx:
  clk: clocking-wizard: calculate dividers fractional parts
  dt-bindings: clock: xilinx: Add reset GPIO for VCU
  dt-bindings: clock: xilinx: Convert VCU bindings to dtschema

* clk-allwinner:
  clk: sunxi-ng: h616: Reparent CPU clock during frequency changes
  clk: sunxi-ng: a64: stop force-selecting PLL-MIPI as TCON0 parent
  clk: sunxi-ng: a64: drop redundant CLK_PLL_VIDEO0_2X and CLK_PLL_MIPI
  dt-bindings: clock: sunxi: Export PLL_VIDEO_2X and PLL_MIPI

* clk-imx:
  clk: imx: Apply some clks only for i.MX93
  arm64: dts: imx93: Use IMX93_CLK_SPDIF_IPG as SPDIF IPG clock
  clk: imx93: Add IMX93_CLK_SPDIF_IPG clock
  dt-bindings: clock: imx93: Add SPDIF IPG clk
  clk: imx: pll14xx: Add 208 MHz and 416 MHz entries for PLL1416x
  clk: imx8mp: Fix clkout1/2 support

* clk-qcom: (63 commits)
  clk: qcom: Select CLK_X1E80100_GCC in config CLK_X1P42100_GPUCC
  dt-bindings: clock: move qcom,x1e80100-camcc to its own file
  clk: qcom: smd-rpm: Add clocks for MSM8940
  dt-bindings: clock: qcom,rpmcc: Add MSM8940 compatible
  clk: qcom: smd-rpm: Add clocks for MSM8937
  dt-bindings: clock: qcom,rpmcc: Add MSM8937 compatible
  clk: qcom: ipq5424: Use icc-clk for enabling NoC related clocks
  dt-bindings: interconnect: Add Qualcomm IPQ5424 support
  clk: qcom: Add SM6115 LPASSCC
  dt-bindings: clock: Add Qualcomm SM6115 LPASS clock controller
  clk: qcom: gcc-sdm845: Do not use shared clk_ops for QUPs
  clk: qcom: gcc-sdm845: Add general purpose clock ops
  clk: qcom: clk-rcg2: split __clk_rcg2_configure function
  clk: qcom: clk-rcg2: document calc_rate function
  clk: qcom: gcc-x1e80100: Do not turn off usb_2 controller GDSC
  clk: qcom: ipq5424: add gcc_xo_clk
  dt-bindings: clock: qcom: gcc-ipq5424: add gcc_xo_clk macro
  dt-bindings: clock: qcom: gcc-ipq5424: remove apss_dbg clock macro
  clk: qcom: ipq5424: remove apss_dbg clock
  dt-bindings: clock: qcom,sdm845-camcc: add sdm670 compatible
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branches 'clk-cleanup', 'clk-renesas', 'clk-mediatek', 'clk-samsung' and 'clk-socfpga' into clk-next</title>
<updated>2025-01-21T19:22:03+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2025-01-21T19:22:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=70741cc38463371914f49a1f4fda5de2afdc4c86'/>
<id>70741cc38463371914f49a1f4fda5de2afdc4c86</id>
<content type='text'>
 - Support for 5L35023 variant of Versa 3 clock generator

* clk-cleanup:
  clk: analogbits: Fix incorrect calculation of vco rate delta
  clk: Use str_enable_disable-like helpers
  clk: clk-loongson2: Switch to use devm_clk_hw_register_fixed_rate_parent_data()
  clk: starfive: Make _clk_get become a common helper function
  clk: ep93xx: make const read-only arrays static
  clk: lmk04832: make read-only const arrays static
  clk: ti: use kcalloc() instead of kzalloc()
  dt-bindings: clock: st,stm32mp1-rcc: complete the reference path
  dt-bindings: clock: st,stm32mp1-rcc: fix reference paths
  dt-bindings: clock: ti: Convert composite.txt to json-schema
  dt-bindings: clock: ti: Convert gate.txt to json-schema
  clk: Drop obsolete devm_clk_bulk_get_all_enable() helper
  PCI: exynos: Switch to devm_clk_bulk_get_all_enabled()
  soc: mediatek: pwrap: Switch to devm_clk_bulk_get_all_enabled()
  clk: davinci: remove platform data struct
  clk: fix an OF node reference leak in of_clk_get_parent_name()
  clk: mmp: pxa1908-apbc: Fix NULL vs IS_ERR() check
  clk: mmp: pxa1908-apbcp: Fix a NULL vs IS_ERR() check
  clk: mmp: pxa1908-mpmu: Fix a NULL vs IS_ERR() check

* clk-renesas: (24 commits)
  dt-bindings: clock: renesas,r9a08g045-vbattb: Fix include guard
  clk: renesas: r9a09g057: Add clock and reset entries for GIC
  clk: renesas: r9a09g057: Add reset entry for SYS
  clk: renesas: r8a779g0: Add VSPX clocks
  clk: renesas: r8a779g0: Add FCPVX clocks
  clk: renesas: r9a09g047: Add I2C clocks/resets
  clk: renesas: r9a09g047: Add CA55 core clocks
  clk: renesas: rzv2h: Add support for RZ/G3E SoC
  clk: renesas: rzv2h: Add MSTOP support
  dt-bindings: clock: renesas: Document RZ/G3E SoC CPG
  dt-bindings: soc: renesas: Document RZ/G3E SMARC SoM and Carrier-II EVK
  dt-bindings: soc: renesas: Document Renesas RZ/G3E SoC variants
  clk: versaclock3: Add support for the 5L35023 variant
  dt-bindings: clock: versaclock3: Document 5L35023 Versa3 clock generator
  clk: versaclock3: Prepare for the addition of 5L35023 device
  clk: renesas: r9a08g045: Add clocks, resets and power domain support for the ADC IP
  clk: renesas: r8a779h0: Add display clocks
  clk: renesas: r9a09g057: Add support for PLLVDO, CRU clocks, and resets
  clk: renesas: rzv2h: Add selective Runtime PM support for clocks
  clk: renesas: r9a06g032: Use BIT macro consistently
  ...

* clk-mediatek:
  clk: ralink: mtmips: remove duplicated 'xtal' clock for Ralink SoC RT3883
  clk: mediatek: mt2701-img: add missing dummy clk
  clk: mediatek: mt2701-mm: add missing dummy clk
  clk: mediatek: mt2701-bdp: add missing dummy clk
  clk: mediatek: mt2701-aud: fix conversion to mtk_clk_simple_probe
  clk: mediatek: mt2701-vdec: fix conversion to mtk_clk_simple_probe

* clk-samsung:
  clk: samsung: Introduce Exynos990 clock controller driver
  clk: samsung: clk-pll: Add support for pll_{0717x, 0718x, 0732x}
  dt-bindings: clock: samsung: Add Exynos990 SoC CMU bindings

* clk-socfpga:
  clk: socfpga: arria10: Optimize local variables in clk_pll_recalc_rate()
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
 - Support for 5L35023 variant of Versa 3 clock generator

* clk-cleanup:
  clk: analogbits: Fix incorrect calculation of vco rate delta
  clk: Use str_enable_disable-like helpers
  clk: clk-loongson2: Switch to use devm_clk_hw_register_fixed_rate_parent_data()
  clk: starfive: Make _clk_get become a common helper function
  clk: ep93xx: make const read-only arrays static
  clk: lmk04832: make read-only const arrays static
  clk: ti: use kcalloc() instead of kzalloc()
  dt-bindings: clock: st,stm32mp1-rcc: complete the reference path
  dt-bindings: clock: st,stm32mp1-rcc: fix reference paths
  dt-bindings: clock: ti: Convert composite.txt to json-schema
  dt-bindings: clock: ti: Convert gate.txt to json-schema
  clk: Drop obsolete devm_clk_bulk_get_all_enable() helper
  PCI: exynos: Switch to devm_clk_bulk_get_all_enabled()
  soc: mediatek: pwrap: Switch to devm_clk_bulk_get_all_enabled()
  clk: davinci: remove platform data struct
  clk: fix an OF node reference leak in of_clk_get_parent_name()
  clk: mmp: pxa1908-apbc: Fix NULL vs IS_ERR() check
  clk: mmp: pxa1908-apbcp: Fix a NULL vs IS_ERR() check
  clk: mmp: pxa1908-mpmu: Fix a NULL vs IS_ERR() check

* clk-renesas: (24 commits)
  dt-bindings: clock: renesas,r9a08g045-vbattb: Fix include guard
  clk: renesas: r9a09g057: Add clock and reset entries for GIC
  clk: renesas: r9a09g057: Add reset entry for SYS
  clk: renesas: r8a779g0: Add VSPX clocks
  clk: renesas: r8a779g0: Add FCPVX clocks
  clk: renesas: r9a09g047: Add I2C clocks/resets
  clk: renesas: r9a09g047: Add CA55 core clocks
  clk: renesas: rzv2h: Add support for RZ/G3E SoC
  clk: renesas: rzv2h: Add MSTOP support
  dt-bindings: clock: renesas: Document RZ/G3E SoC CPG
  dt-bindings: soc: renesas: Document RZ/G3E SMARC SoM and Carrier-II EVK
  dt-bindings: soc: renesas: Document Renesas RZ/G3E SoC variants
  clk: versaclock3: Add support for the 5L35023 variant
  dt-bindings: clock: versaclock3: Document 5L35023 Versa3 clock generator
  clk: versaclock3: Prepare for the addition of 5L35023 device
  clk: renesas: r9a08g045: Add clocks, resets and power domain support for the ADC IP
  clk: renesas: r8a779h0: Add display clocks
  clk: renesas: r9a09g057: Add support for PLLVDO, CRU clocks, and resets
  clk: renesas: rzv2h: Add selective Runtime PM support for clocks
  clk: renesas: r9a06g032: Use BIT macro consistently
  ...

* clk-mediatek:
  clk: ralink: mtmips: remove duplicated 'xtal' clock for Ralink SoC RT3883
  clk: mediatek: mt2701-img: add missing dummy clk
  clk: mediatek: mt2701-mm: add missing dummy clk
  clk: mediatek: mt2701-bdp: add missing dummy clk
  clk: mediatek: mt2701-aud: fix conversion to mtk_clk_simple_probe
  clk: mediatek: mt2701-vdec: fix conversion to mtk_clk_simple_probe

* clk-samsung:
  clk: samsung: Introduce Exynos990 clock controller driver
  clk: samsung: clk-pll: Add support for pll_{0717x, 0718x, 0732x}
  dt-bindings: clock: samsung: Add Exynos990 SoC CMU bindings

* clk-socfpga:
  clk: socfpga: arria10: Optimize local variables in clk_pll_recalc_rate()
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: clock: st,stm32-rcc: support spread spectrum clocking</title>
<updated>2025-01-15T23:17:05+00:00</updated>
<author>
<name>Dario Binacchi</name>
<email>dario.binacchi@amarulasolutions.com</email>
</author>
<published>2025-01-14T18:19:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=223d32eb1001dabdb3fc278683361f61cd78b0e2'/>
<id>223d32eb1001dabdb3fc278683361f61cd78b0e2</id>
<content type='text'>
The addition of DT bindings for enabling and tuning spread spectrum
clocking generation is available only for the main PLL of stm32f{4,7}
platforms.

Signed-off-by: Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;

Link: https://lore.kernel.org/r/20250114182021.670435-3-dario.binacchi@amarulasolutions.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The addition of DT bindings for enabling and tuning spread spectrum
clocking generation is available only for the main PLL of stm32f{4,7}
platforms.

Signed-off-by: Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;

Link: https://lore.kernel.org/r/20250114182021.670435-3-dario.binacchi@amarulasolutions.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: clock: convert stm32 rcc bindings to json-schema</title>
<updated>2025-01-15T23:17:05+00:00</updated>
<author>
<name>Dario Binacchi</name>
<email>dario.binacchi@amarulasolutions.com</email>
</author>
<published>2025-01-14T18:19:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=ebca39700f343c42fe37d9606980e8591801c46f'/>
<id>ebca39700f343c42fe37d9606980e8591801c46f</id>
<content type='text'>
The patch converts st,stm32-rcc.txt to the JSON schema, but it does more
than that. The old bindings, in fact, only covered the stm32f{4,7}
platforms and not the stm32h7. Therefore, to avoid patch submission tests
failing, it was necessary to add the corresponding compatible (i. e.
st,stm32h743-rcc) and specify that, in this case, 3 are the clocks instead
of the 2 required for the stm32f{4,7} platforms.
Additionally, the old bindings made no mention of the st,syscfg property,
which is used by both the stm32f{4,7} and the stm32h7 platforms.

The patch also fixes the files referencing to the old st,stm32-rcc.txt.

Signed-off-by: Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;

Link: https://lore.kernel.org/r/20250114182021.670435-2-dario.binacchi@amarulasolutions.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The patch converts st,stm32-rcc.txt to the JSON schema, but it does more
than that. The old bindings, in fact, only covered the stm32f{4,7}
platforms and not the stm32h7. Therefore, to avoid patch submission tests
failing, it was necessary to add the corresponding compatible (i. e.
st,stm32h743-rcc) and specify that, in this case, 3 are the clocks instead
of the 2 required for the stm32f{4,7} platforms.
Additionally, the old bindings made no mention of the st,syscfg property,
which is used by both the stm32f{4,7} and the stm32h7 platforms.

The patch also fixes the files referencing to the old st,stm32-rcc.txt.

Signed-off-by: Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;

Link: https://lore.kernel.org/r/20250114182021.670435-2-dario.binacchi@amarulasolutions.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: clock: move qcom,x1e80100-camcc to its own file</title>
<updated>2025-01-08T03:06:57+00:00</updated>
<author>
<name>Bryan O'Donoghue</name>
<email>bryan.odonoghue@linaro.org</email>
</author>
<published>2025-01-02T16:32:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=7ec95ff9abf499b4775148db92528feb4e8ff1ee'/>
<id>7ec95ff9abf499b4775148db92528feb4e8ff1ee</id>
<content type='text'>
Add an x1e80100 camcc binding. x1e80100 has two power-domain parents unlike
other similar camcc controllers.

Differentiate the new structure into a unique camcc definition. Other
similar camcc controller setups can then be easily added to this one.

Suggested-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Bryan O'Donoghue &lt;bryan.odonoghue@linaro.org&gt;
Link: https://lore.kernel.org/r/20250102-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v3-2-cb66d55d20cc@linaro.org
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add an x1e80100 camcc binding. x1e80100 has two power-domain parents unlike
other similar camcc controllers.

Differentiate the new structure into a unique camcc definition. Other
similar camcc controller setups can then be easily added to this one.

Suggested-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Bryan O'Donoghue &lt;bryan.odonoghue@linaro.org&gt;
Link: https://lore.kernel.org/r/20250102-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v3-2-cb66d55d20cc@linaro.org
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: clock: qcom,rpmcc: Add MSM8940 compatible</title>
<updated>2025-01-08T03:06:13+00:00</updated>
<author>
<name>Daniil Titov</name>
<email>daniilt971@gmail.com</email>
</author>
<published>2024-12-31T16:00:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=ec2514d5379ddbe4191f81d99c8fe6a235d0e802'/>
<id>ec2514d5379ddbe4191f81d99c8fe6a235d0e802</id>
<content type='text'>
Document the qcom,rpmcc-msm8940 compatible.

Signed-off-by: Daniil Titov &lt;daniilt971@gmail.com&gt;
Signed-off-by: Barnabás Czémán &lt;barnabas.czeman@mainlining.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Link: https://lore.kernel.org/r/20241231-rpmcc-v1-3-1212df9b2042@mainlining.org
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Document the qcom,rpmcc-msm8940 compatible.

Signed-off-by: Daniil Titov &lt;daniilt971@gmail.com&gt;
Signed-off-by: Barnabás Czémán &lt;barnabas.czeman@mainlining.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Link: https://lore.kernel.org/r/20241231-rpmcc-v1-3-1212df9b2042@mainlining.org
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
