linux-stable.git/Documentation/devicetree/bindings/ata, branch linux-4.7.y Linux kernel stable tree Merge tag 'devicetree-for-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux 2016-05-20T21:51:34+00:00 Linus Torvalds torvalds@linux-foundation.org 2016-05-20T21:51:34+00:00 e7f44b65b532040ac90b73b60ea0b629742ced33 Pull devicetree updates from Rob Herring: - Rewrite of the unflattening code to avoid recursion and lessen the stack usage. - Rewrite of the phandle args parsing code to get rid of the fixed args size. This is needed for IOMMU code. - Sync to latest dtc which adds more dts style checking. These warnings are enabled with "W=1" compiles. - Tegra documentation updates related to the above warnings. - A bunch of spelling and other doc fixes. - Various vendor prefix additions. * tag 'devicetree-for-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (52 commits) devicetree: Add Creative Technology vendor id gpio: dt-bindings: add ibm,ppc4xx-gpio binding of/unittest: Remove unnecessary module.h header inclusion drivers/of: Fix build warning in populate_node() drivers/of: Fix depth when unflattening devicetree of: dynamic: changeset prop-update revert fix drivers/of: Export of_detach_node() drivers/of: Return allocated memory from of_fdt_unflatten_tree() drivers/of: Specify parent node in of_fdt_unflatten_tree() drivers/of: Rename unflatten_dt_node() drivers/of: Avoid recursively calling unflatten_dt_node() drivers/of: Split unflatten_dt_node() of: include errno.h in of_graph.h of: document refcount incrementation of of_get_cpu_node() Documentation: dt: soc: fix spelling mistakes Documentation: dt: power: fix spelling mistake Documentation: dt: pinctrl: fix spelling mistake Documentation: dt: opp: fix spelling mistake Documentation: dt: net: fix spelling mistakes Documentation: dt: mtd: fix spelling mistake ... 
Pull devicetree updates from Rob Herring:

 - Rewrite of the unflattening code to avoid recursion and lessen the
   stack usage.

 - Rewrite of the phandle args parsing code to get rid of the fixed args
   size.  This is needed for IOMMU code.

 - Sync to latest dtc which adds more dts style checking.  These
   warnings are enabled with "W=1" compiles.

 - Tegra documentation updates related to the above warnings.

 - A bunch of spelling and other doc fixes.

 - Various vendor prefix additions.

* tag 'devicetree-for-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (52 commits)
  devicetree: Add Creative Technology vendor id
  gpio: dt-bindings: add ibm,ppc4xx-gpio binding
  of/unittest: Remove unnecessary module.h header inclusion
  drivers/of: Fix build warning in populate_node()
  drivers/of: Fix depth when unflattening devicetree
  of: dynamic: changeset prop-update revert fix
  drivers/of: Export of_detach_node()
  drivers/of: Return allocated memory from of_fdt_unflatten_tree()
  drivers/of: Specify parent node in of_fdt_unflatten_tree()
  drivers/of: Rename unflatten_dt_node()
  drivers/of: Avoid recursively calling unflatten_dt_node()
  drivers/of: Split unflatten_dt_node()
  of: include errno.h in of_graph.h
  of: document refcount incrementation of of_get_cpu_node()
  Documentation: dt: soc: fix spelling mistakes
  Documentation: dt: power: fix spelling mistake
  Documentation: dt: pinctrl: fix spelling mistake
  Documentation: dt: opp: fix spelling mistake
  Documentation: dt: net: fix spelling mistakes
  Documentation: dt: mtd: fix spelling mistake
  ...
dt-bindings: tegra: Rename some bindings for consistency 2016-04-19T22:25:19+00:00 Thierry Reding treding@nvidia.com 2016-04-12T15:07:36+00:00 a8ca1b28acf543143bb96f62eb1423164accaa53 Device tree binding for NVIDIA Tegra have traditionally carried the "nvidia," vendor prefix in the filename. A couple of odd ones don't, so fix them up for consistency. Also rename existing bindings to reflect the first compatible value that they document. This wasn't done consistently either. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Rob Herring <robh@kernel.org> 
Device tree binding for NVIDIA Tegra have traditionally carried the
"nvidia," vendor prefix in the filename. A couple of odd ones don't, so
fix them up for consistency.

Also rename existing bindings to reflect the first compatible value that
they document. This wasn't done consistently either.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Rob Herring <robh@kernel.org>
ata: ahci-platform: Add ports-implemented DT bindings. 2016-04-01T14:30:30+00:00 Srinivas Kandagatla srinivas.kandagatla@linaro.org 2016-04-01T07:52:57+00:00 17dcc37e3e847bc0e67a5b1ec52471fcc6c18682 On some SOCs PORTS_IMPL register value is never programmed by the firmware and left at zero value. Which means that no sata ports are available for software. AHCI driver used to cope up with this by fabricating the port_map if the PORTS_IMPL register is read zero, but recent patch broke this workaround as zero value was valid for NVMe disks. This patch adds ports-implemented DT bindings as workaround for this issue in a way that DT can can override the PORTS_IMPL register in cases where the firmware did not program it already. Fixes: 566d1827df2e ("libata: disable forced PORTS_IMPL for >= AHCI 1.3") Cc: stable@vger.kernel.org # v4.5+ Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Acked-by: Tejun Heo <tj@kernel.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Tejun Heo <tj@kernel.org> 
On some SOCs PORTS_IMPL register value is never programmed by the
firmware and left at zero value. Which means that no sata ports are
available for software. AHCI driver used to cope up with this by
fabricating the port_map if the PORTS_IMPL register is read zero,
but recent patch broke this workaround as zero value was valid for
NVMe disks.

This patch adds ports-implemented DT bindings as workaround for this issue
in a way that DT can can override the PORTS_IMPL register in cases where
the firmware did not program it already.

Fixes: 566d1827df2e ("libata: disable forced PORTS_IMPL for >= AHCI 1.3")
Cc: stable@vger.kernel.org # v4.5+
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Tejun Heo <tj@kernel.org>
Reviewed-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Tejun Heo <tj@kernel.org>
Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 2016-03-20T22:26:57+00:00 Linus Torvalds torvalds@linux-foundation.org 2016-03-20T22:26:57+00:00 915c56bc01d6eab071e0dd1c6ea3bf73fbe5124f Pull ARM 64-bit DT updates from Arnd Bergmann: "The arm64 device tree changes make up an increasing portion of the overall changes, so they are kept separate from the 32-bit devicetree changes and from the other arm64 updates. Newly added SoCs and boards are: - 96Boards Husky board - AMD Overdrive board - Amlogic S905 SoC and related Tronsmart boxes - Annapurna Labs Alpine family and development board - Broadcom Vulcan servers - Broadcom Northstar 2 SoC - Marvell Armada 3700 family and development board - Qualcomm MSM8996 SoC Additional devices are enabled for existing platforms from Applied Micro, Hisilicon, Mediatek, Qualcomm, and Renesas and there are a couple of other updates for Rockchip, Xilinx and NXP/Freescale" * tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (102 commits) ARM64: dts: amlogic: Add Tronsmart Vega S95 configs Documentation: devicetree: amlogic: Document Tronsmart Vega S95 boards ARM64: dts: Prepare configs for Amlogic Meson GXBaby Documentation: devicetree: amlogic: Document Meson GXBaby devicetree: bindings: Add vendor prefix for Tronsmart arm64: dts: qcom: Fix MPP's function used for LED control arm64: dts: alpine: add the MSIX node in the Alpine v2 dtsi arm64: dts: add the Alpine v2 EVP arm64: dts: marvell: re-order Device Tree nodes for Armada AP806 arm64: dts: marvell: update Armada AP806 clock description arm64: dts: marvell: add Device Tree files for Armada 7K/8K arm64: dts: apm: Add DT node for X-Gene v2 SLIMpro Mailbox I2C Driver arm64: dts: apm: Mailbox device tree node for APM X-Gene v2 platform. arm64: dts: apm: Add DT node for X-Gene v1 SLIMpro Mailbox I2C Driver arm64: dts: apm: mailbox device tree node for APM X-Gene platform. arm64: dts: apm: Update GPIO to control power-off on X-Gene v2 platforms arm64: dts: apm: Update GPIO standby controller DT node for X-Gene v2 platforms arm64: dts: apm: Update GPIO to control power-off on X-Gene v1 platforms arm64: dts: salvator-x: enable USB 2.0 Host of channel 1 and 2 arm64: dts: salvator-x: enable usb2_phy of channel 1 and 2 ... 
Pull ARM 64-bit DT updates from Arnd Bergmann:
 "The arm64 device tree changes make up an increasing portion of the
  overall changes, so they are kept separate from the 32-bit devicetree
  changes and from the other arm64 updates.

  Newly added SoCs and boards are:
   - 96Boards Husky board
   - AMD Overdrive board
   - Amlogic S905 SoC and related Tronsmart boxes
   - Annapurna Labs Alpine family and development board
   - Broadcom Vulcan servers
   - Broadcom Northstar 2 SoC
   - Marvell Armada 3700 family and development board
   - Qualcomm MSM8996 SoC

  Additional devices are enabled for existing platforms from Applied
  Micro, Hisilicon, Mediatek, Qualcomm, and Renesas and there are a
  couple of other updates for Rockchip, Xilinx and NXP/Freescale"

* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (102 commits)
  ARM64: dts: amlogic: Add Tronsmart Vega S95 configs
  Documentation: devicetree: amlogic: Document Tronsmart Vega S95 boards
  ARM64: dts: Prepare configs for Amlogic Meson GXBaby
  Documentation: devicetree: amlogic: Document Meson GXBaby
  devicetree: bindings: Add vendor prefix for Tronsmart
  arm64: dts: qcom: Fix MPP's function used for LED control
  arm64: dts: alpine: add the MSIX node in the Alpine v2 dtsi
  arm64: dts: add the Alpine v2 EVP
  arm64: dts: marvell: re-order Device Tree nodes for Armada AP806
  arm64: dts: marvell: update Armada AP806 clock description
  arm64: dts: marvell: add Device Tree files for Armada 7K/8K
  arm64: dts: apm: Add DT node for X-Gene v2 SLIMpro Mailbox I2C Driver
  arm64: dts: apm: Mailbox device tree node for APM X-Gene v2 platform.
  arm64: dts: apm: Add DT node for X-Gene v1 SLIMpro Mailbox I2C Driver
  arm64: dts: apm: mailbox device tree node for APM X-Gene platform.
  arm64: dts: apm: Update GPIO to control power-off on X-Gene v2 platforms
  arm64: dts: apm: Update GPIO standby controller DT node for X-Gene v2 platforms
  arm64: dts: apm: Update GPIO to control power-off on X-Gene v1 platforms
  arm64: dts: salvator-x: enable USB 2.0 Host of channel 1 and 2
  arm64: dts: salvator-x: enable usb2_phy of channel 1 and 2
  ...
Documentation: dt-bindings: Add a new compatible for the Armada 3700 2016-02-17T15:09:53+00:00 Gregory CLEMENT gregory.clement@free-electrons.com 2016-02-02T17:13:27+00:00 dfc44af9f8ab66a7a66c8835a5d953dcbb4a918f The AHCI interfaces used in the Armada 3700 has a few differences with the one used in the Armada 38x, so it deserves its own compatible string. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> 
The AHCI interfaces used in the Armada 3700 has a few differences with
the one used in the Armada 38x, so it deserves its own compatible string.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
libata: support AHCI on OCTEON platform 2016-02-11T15:12:04+00:00 Aleksey Makarov aleksey.makarov@caviumnetworks.com 2016-02-11T13:53:08+00:00 a2127e400edd2258fda6d83fe8b10b878a3595d9 The OCTEON SATA controller is currently found on cn71XX devices. Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Vinita Gupta <vgupta@caviumnetworks.com> Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com> Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Signed-off-by: Tejun Heo <tj@kernel.org> 
The OCTEON SATA controller is currently found on cn71XX devices.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Vinita Gupta <vgupta@caviumnetworks.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
ata: ahci_brcmstb: add support for MIPS-based platforms 2016-01-01T02:19:35+00:00 Jaedon Shin jaedon.shin@gmail.com 2015-11-26T02:56:29+00:00 1980eb9bd7d733ce089f9b154c08c2c71fb1f2a7 The BCM7xxx ARM-based and MIPS-based platforms share a similar hardware block for AHCI SATA3. This new compatible string, "brcm,bcm7425-ahci", may be used for most MIPS-based platforms of 40nm process technology. Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org> 
The BCM7xxx ARM-based and MIPS-based platforms share a similar hardware
block for AHCI SATA3.

This new compatible string, "brcm,bcm7425-ahci", may be used for most
MIPS-based platforms of 40nm process technology.

Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
sata_rcar: Add compatible string for r8a7795 2015-11-20T20:48:55+00:00 Kouei Abe kouei.abe.cp@renesas.com 2015-11-20T12:33:02+00:00 fec7bc433a29ea75b83dd9447629c99b2d4d727a R-Car H3 SoC has compatible SATA controller with R-Car Gen2 SoCs. Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org> Acked-by: Simon Horman <horms+renesas@verge.net.au> 
R-Car H3 SoC has compatible SATA controller with R-Car Gen2 SoCs.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
devicetree: bindings: Fixed a few typos 2015-10-31T00:52:15+00:00 Tang Yuantian Yuantian.Tang@freescale.com 2015-10-29T06:22:17+00:00 d72c0f430b19a7ee80d904a59c6c9a1c40e016cc There is a few typos in Freescale QorIQ AHCI bindings, This patch fixes them. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Tejun Heo <tj@kernel.org> 
There is a few typos in Freescale QorIQ AHCI bindings, This
patch fixes them.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
ahci: qoriq: Rename LS2085A SoC support code to LS2080A 2015-10-31T00:52:15+00:00 Tang Yuantian Yuantian.Tang@freescale.com 2015-10-29T06:22:15+00:00 d19f9aaf01341bd02da3aca3197751f52155551a Freescale is renaming the LS2085A SoC to LS2080A. This patch addresses the same. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Tejun Heo <tj@kernel.org> 
Freescale is renaming the LS2085A SoC to LS2080A.
This patch addresses the same.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Tejun Heo <tj@kernel.org>