From ebecffe930384eb44d9ba75f052d25b9dc41c91d Mon Sep 17 00:00:00 2001 From: Marcel Moolenaar Date: Wed, 28 Mar 2007 18:34:59 +0000 Subject: For embedded UARTs compatible with the ns8250 family it is possible that the driver clock is identical to the processor or bus clock. This is the case for the PowerQUICC processor. When the clock is high enough, overflows happen in the calculation of the time it takes to send 1/10 of a character, used in delay loops. Fix the overflows so as to fix bugs in the delay loops that can cause either insufficient delays or excessive delays. --- sys/dev/uart/uart_dev_ns8250.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'sys/dev') diff --git a/sys/dev/uart/uart_dev_ns8250.c b/sys/dev/uart/uart_dev_ns8250.c index 4262f8d53b7b..8e6177be329d 100644 --- a/sys/dev/uart/uart_dev_ns8250.c +++ b/sys/dev/uart/uart_dev_ns8250.c @@ -81,7 +81,9 @@ ns8250_delay(struct uart_bas *bas) uart_barrier(bas); /* 1/10th the time to transmit 1 character (estimate). */ - return (16000000 * divisor / bas->rclk); + if (divisor <= 134) + return (16000000 * divisor / bas->rclk); + return (16000 * divisor / (bas->rclk / 1000)); } static int -- cgit v1.2.3